Clock deskewing method, apparatus, and system

Details Clock deskewing method, apparatus, and system Clock deskewing method, apparatus, and system

2005-12-23

2010-02-23

Trinh, Tan (Department: 2618)

Telecommunications

Receiver or analog modulated signal frequency converter

Local control of receiver operation

C455S303000, C455S304000, C455S259000

Reexamination Certificate

active

07668524

ABSTRACT:
An integrated circuit includes clock deskew circuitry. The deskew circuitry includes a loop circuit to align an input clock signal with an output clock signal, and also aligns transmitted data with the output clock signal.

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Hatakaeyama, Atsushi , “A 256-Mb SDRAM Using a Register-Controlled Digital DLL”,IEEE Journal of Solid-State Circuit, vol. 32, No. 11, (Nov. 1977),1728-1734.

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