Clock delay compensating and duty controlling apparatus of a pha

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform

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Details

327261, 327141, 327149, 327147, 327156, 327158, 327175, 327291, 327292, 331 25, H03L 700, H03K 5159

Patent

active

055680780

ABSTRACT:
For clock delay compensation and duty control of a phase-locked loop in a decoder of a video signal receiving system, phases of two input clocks received into a phase comparative detector are compared to divide a reference clock from an oscillator of the phase comparative detector for obtaining a resultant phase error output in a divider in accordance with the result of the phase comparison, a duty ratio of the output clock therefrom is controlled in a duty controller to allow the phase comparative detector to be utilized free from the duty ratio of the clock, and a clock delay compensator performs correction of clock delay compensation of the system operated at high speed in the synchronized phase-locked loop, thereby controlling a duty ratio of a signal divided in the divider when determining accuracy, frequency and stabilization in the duty controller, and correcting an error in delay time by adding the clock delay compensator.

REFERENCES:
patent: 5008636 (1991-04-01), Markinson et al.
patent: 5118975 (1992-06-01), Hillis et al.
patent: 5329599 (1994-07-01), Curry et al.

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