Clock converter and electronic apparatus with the same

Oscillators – Automatic frequency stabilization using a phase or frequency... – Particular frequency control means

Reexamination Certificate

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Details

C331S074000, C331S1160FE, C331S1070DP

Reexamination Certificate

active

10670986

ABSTRACT:
A voltage controlled oscillating means in a clock converter outputs a positive feedback signal for a positive feedback loop from one output terminal of buffer means forming a portion of a positive feedback loop using voltage controlled phase shifting means and outputs a PLL feedback signal from the other output terminal of the buffer means. The PLL feedback signal is fed back to phase detector means through a signal transmitting circuit. As a result, it is possible to form a PLL feedback loop, which is not affected by the load to thus output a stable clock signal of high frequency. Furthermore, it is possible to realize a small clock converter by narrowing the line width of a wiring pattern in the signal transmitting circuit.

REFERENCES:
patent: 6606007 (2003-08-01), Washburn
patent: 6703877 (2004-03-01), Kobayashi et al.
patent: 2001/0017560 (2001-08-01), Kato et al.
patent: 2002/0125964 (2002-09-01), Ash
patent: 10-261956 (1998-09-01), None
patent: 10-319149 (1998-12-01), None

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