Clock controller employing a discrete time control loop method f

Details Clock controller employing a discrete time control loop method f Clock controller employing a discrete time control loop method f

1992-10-28

1994-03-15

Hajec, Donald

Dynamic information storage or retrieval

Binary pulse train information signal

Binary signal gain processing

360 51, H04N 576, G11B 509

Patent

active

052951286

ABSTRACT:
A digital data clock control loop for reconstructing the asynchronous data clock in a recording channel. The Discrete Time Control Loop (DTCL) implementation is suitable for monolithic digital embodiment and uses no analog components, providing stable operation at widely varying clock rates without hardware oscillators. The DTCL also can supply the clocking function to recover synchronous samples in an asynchronous data sampling system.

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patent: 5121263 (1992-06-01), Kerwin et al.
patent: 5216554 (1993-06-01), Schneider
"A Survey of Digital Phase Locked Loops" by William C. Lindsey; Reprinted from Proc. IEEE in Apr. 1981.

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