Clock control unit responsive to a power management state for cl

Details Clock control unit responsive to a power management state for cl Clock control unit responsive to a power management state for cl

1994-10-19

1996-12-17

Heckler, Thomas M.

G06F 106

Patent

active

055863086

ABSTRACT:
An integrated processor is fabricated on a single monolithic circuit and employs circuitry to accommodate data-intensive, view-intensive and voice-intensive requirements of modern-day PIDs. The integrated processor includes a CPU core, a memory controller, and a variety of peripheral devices to achieve versatility and high performance functionality. The integrated processor consumes less power by provision of a clock control unit including a plurality of phase-locked loops for generating clock signals of differing frequencies to appropriately clock the various subsystems of the integrated processor. The clock signals provided to the various subsystems by the clock control unit are derived from a single crystal oscillator input signal. A power management unit is incorporated within the integrated processor to control the frequency and/or application of certain clock signals to the various subsystems, as well as to control other power management related functions. The pin-count of the integrated processor is finally minimized by allowing the selective multiplexing of certain external pins depending upon the desired functionality of the integrated processor.

REFERENCES:
patent: 4931748 (1990-06-01), McDermott et al.
patent: 5378935 (1995-01-01), Korhonen et al.
patent: 5389830 (1995-02-01), Buckingham et al.

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