Clock control circuits, systems and methods

Details Clock control circuits, systems and methods Clock control circuits, systems and methods

1995-06-07

1998-01-20

Butler, Dennis M.

395558, 395559, 395560, 395750, G06F 104, G06F 108

Patent

active

057109117

ABSTRACT:
A microprocessor device (102) includes a central processing unit (702) having a clock input, a clock generator (OSC, PLL) of clock pulses, a logic circuit (708) having an output to supply a clock control signal (SUSP), and a clock gate (3610) fed by the clock pulses and having a clock gate output (CPU.sub.-- CLK) coupled to the clock input of the central processing unit. The clock gate (3610) responds to the clock control signal (SUSP) to prevent said clock pulses (CPU.sub.-- CLK) from reaching the central processing unit within one clock cycle of a change in said clock control signal. Other devices, systems and methods are also disclosed.

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