Clock control circuit for reducing consumption current in...

Details Clock control circuit for reducing consumption current in... Clock control circuit for reducing consumption current in...

2005-12-29

2008-01-29

Phan, Trong (Department: 2827)

Static information storage and retrieval

Addressing

Sync/clocking

C365S189050, C365S189080, C365S189120, C365S194000, C365S230080

Reexamination Certificate

active

07324404

ABSTRACT:
The present invention relates to a clock control circuit, it can reduce power consumption in data input and output operations, and a semiconductor memory device including the clock control circuit, and data input and output operation method of the semiconductor memory device. The clock control circuit according to the present invention can generate an input or output control clock signal only when data are substantially input or output in the data input and output operations. It is thus possible to save unnecessary power consumption.

REFERENCES:
patent: 6151270 (2000-11-01), Jeong
patent: 6948084 (2005-09-01), Manapat et al.
patent: 6996016 (2006-02-01), Oh
patent: 7054223 (2006-05-01), Takahashi et al.

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