Clock control circuit for generating an internal clock signal wi

Details Clock control circuit for generating an internal clock signal wi Clock control circuit for generating an internal clock signal wi

1999-07-30

2000-08-15

Tran, Andrew Q.

Static information storage and retrieval

Addressing

Sync/clocking

3652335, 365240, 36518511, 36518533, 326 95, 326 96, 327142, 327144, 327152, 327298, G11C 818

Patent

active

061046671

ABSTRACT:
A clock control circuit receives an external clock signal and generates an internal clock signal. Through use of internal programming and an external trigger signal, the clock control circuit blocks out one or more of the clock cycles of the external clock signal to generate the internal clock signal. The clock control circuit can be used in any semiconductor device, and especially in synchronous flash memory devices with a burst operation. In the synchronous flash memory devices, one or more of the internal clock cycles are blocked out to account for increased delays during certain data sensing operations such as word line switching during data reading. In the synchronous flash memory devices, the sensed data is stored in input/output buffers and transferred out synchronously to the external clock signal.

REFERENCES:
patent: 5459419 (1995-10-01), Hatakenka
patent: 5490107 (1996-02-01), Akaogi et al.

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