Clock control circuit and method

Details Clock control circuit and method Clock control circuit and method

2006-10-10

2006-10-10

Lam, Tuan T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

C327S292000, C327S295000

Reexamination Certificate

active

07119599

ABSTRACT:
A clock controlling circuit and method for eliminating the delay difference in the entire clock propagation line. Circuit scale is reduced as compared to a case of using a PLL or DLL circuit. A timing averaging circuit10is fed with clocks from a position on a forward route111of a direction-reversed clock propagation path, adapted for being fed with input clocks at its one end, and from a position on a return route112corresponding to the position on the forward route111. The timing difference between these clocks is averaged to output an averaged timing difference.

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