Clock circuit for semiconductor memories

Details Clock circuit for semiconductor memories Clock circuit for semiconductor memories

2008-03-18

2008-03-18

Nguyen, Van Thu (Department: 2824)

Static information storage and retrieval

Addressing

Sync/clocking

C365S194000, C365S191000

Reexamination Certificate

active

11253715

ABSTRACT:
A circuit and method for producing a read clock signal in a semiconductor memory device from an input clock signal to ensure that the read access time does not exceed the clock cycle time. One of a plurality of delay amounts is selected to be imposed on the input clock signal depending on the frequency of the clock signal.

REFERENCES:
patent: 6914852 (2005-07-01), Choi
patent: 7142470 (2006-11-01), Tseng
patent: 2004/0103226 (2004-05-01), Johnson et al.

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