Clock circuit for generating non-overlapping pulses

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307269, 307453, 307601, 307608, H03K 3356, H03K 5153, H03K 17284, H03K 17693

Patent

active

044726457

ABSTRACT:
A clock generator for producing a two phase output comprises a bistable circuit having two stages. The output of each stage is cross coupled to the input of the other and each cross coupling path includes a high-resistance transfer gate. Each transfer gate forms part of an RC delay element which is so arranged that at a transition of clock signals the output of one of the stages completes its transition substantially at the same time as the output of the other stage begins its transition. This results in non-overlapping outputs from the generator.

REFERENCES:
patent: 3292100 (1966-12-01), Berlind
patent: 3578989 (1971-05-01), Heuner
patent: 3668436 (1972-06-01), Bacon
patent: 3767945 (1973-10-01), Goser
patent: 3927334 (1975-12-01), Callahan
patent: 3961269 (1976-06-01), Alverez, Jr.
patent: 4291240 (1981-09-01), Rosler
patent: 4388537 (1983-06-01), Kanuma
IBM Technical Disclosure Bulletin, vol. 22, No. 3, Aug. 1979, New York (US), B. Cassidy et al.: "Dynamic MOSFET Logic Clock Driver", pp. 1093-1094.
"Two-Phase Clock Features Nonoverlapping Outputs" by Heckt, Electronics, Jan. 20, 1977, p. 99.

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