Clock buffers arranged in a peripheral region of the logic circu

Details Clock buffers arranged in a peripheral region of the logic circu Clock buffers arranged in a peripheral region of the logic circu

1990-01-31

1992-12-15

Trans, Vincent N.

Boots, shoes, and leggings

364490, 307480, 3074821, G06F 1560, H03K 1901

Patent

active

051723301

ABSTRACT:
In designing an integrated circuit having a logic circuit area and a clock supplying circuit, the layout of the clock supplying circuit can be designed before the completion of the layout designing of the logic circuit area. Clock buffers and wires that are component elements of the clock supplying circuit are arranged in a peripheral region of the logic circuit area. This arrangement enables the layout designing of the clock supplying circuit to be done with no influence of the layout designing of the logic circuit area.

REFERENCES:
patent: 4661721 (1987-04-01), Ushiku
patent: 4812684 (1989-03-01), Yamagiwa et al.
patent: 4857765 (1989-08-01), Cahill et al.
patent: 4958092 (1990-09-01), Tanaka
patent: 5012427 (1991-04-01), Kuribayashi
patent: 5013942 (1991-05-01), Nishimura et al.

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