Clock buffer circuit and clock signal buffering method which can

Details Clock buffer circuit and clock signal buffering method which can Clock buffer circuit and clock signal buffering method which can

1998-10-30

2000-09-12

Wambach, Margaret R.

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

Nonlinear amplifying circuit

327292, 327299, 327332, 327387, 327562, 327563, G06G 726

Patent

active

061183334

ABSTRACT:
A clock buffer circuit includes an amplifier section and a control section. The amplifier section amplifies a clock signal in response to a control signal. The control section generates the control signal based on an amplitude of the clock signal.

REFERENCES:
patent: 4978872 (1990-12-01), Morse
patent: 5694386 (1997-12-01), Hirajima et al.
patent: 5812030 (1998-09-01), Inami
patent: 5914634 (1998-09-01), Oberhammer

Affiliated with

Also associated with

Rating

Clock buffer circuit and clock signal buffering method which can does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Clock buffer circuit and clock signal buffering method which can, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clock buffer circuit and clock signal buffering method which can will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-99411