Clock buffer

Details Clock buffer Clock buffer

2011-08-02

2011-08-02

Nguyen, Hai L (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

C327S309000

Reexamination Certificate

active

07990188

ABSTRACT:
An apparatus is provided. The apparatus comprises a first bipolar junction transistor (BJT) differential pair having a first BJT and a second BJT, a second BJT differential pair having a third BJT and a fourth BJT, a first clamp having a fifth BJT and a sixth BJT, and a second clamp having a seventh BJT and an eighth BJT. The collector and base of the third BJT are respectively coupled to the collector and base of the first BJT, and the collector and base of the fourth BJT are respectively coupled to the collector and base of the second BJT. The bases of first, second, third, and fourth BJTs receive an input clock signal. The emitters of the fifth and sixth BJTs are coupled to the collectors of the first and third BJTs, while the emitters of the seventh and eight BJTs are coupled to the collectors of the second and fourth BJTs. The bases of the fifth and seventh BJT are adapted to receive a low clamping voltage, and the bases of the sixth and eighth BJTs are adapted to receive a high clamping voltage. Additionally, the first and second clamps is coupled to the collectors of the first, second, third, and fourth BJTs.

REFERENCES:
patent: 6292037 (2001-09-01), Itoh
patent: 6885225 (2005-04-01), Ohmichi et al.
patent: 7724061 (2010-05-01), Chon et al.
patent: 7906995 (2011-03-01), Payne et al.

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