Clock and data recovery system and method for clock and data...

Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data

Reexamination Certificate

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C375S371000

Reexamination Certificate

active

08054926

ABSTRACT:
The forward error correction based clock and data recovery system includes a data latch for intermediately storing received data, which is triggered by a sampling clock. The system further includes an error determination unit for determining whether which of the sampled received data is wrong, and for generating out of it a phase/frequency correction signal. Furthermore, the system includes a clock generator for generating the sampling clock depending on the correction signal.

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patent: 2005/0058234 (2005-03-01), Stojanovic
patent: 2006/0062339 (2006-03-01), Briones

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