Clock acquisition indicator circuit for NRZ data

Details Clock acquisition indicator circuit for NRZ data Clock acquisition indicator circuit for NRZ data

1985-10-02

1987-05-05

Griffin, Robert L.

Pulse or digital communications

Spread spectrum

Direct sequence

307527, H04L 702

Patent

active

046637699

ABSTRACT:
A clock acquisition indicator circuit for NRZ "data", "which requires" two clock signals advanced and retarded by 90-degrees from the recovered clock. The circuit partitions each cycle of recovered clock into a half-cycle in which transitions should occur and a half-cycle in which transitions should not occur. The transitions ideally occur at only one instant in each cycle (when the clock goes positive), but the widening of the window to an entire half-cycle centered on this instant allows for phase noise on the NRZ data transitions and phase jitter in the recovered clock. The remaining half-cycle (which is centered on the instant when the clock goes negative) is a window during which transitions should not occur. The density of transitions in each of these windows is output as analog voltages which may be processed to determine the prevailing state from among three possible conditions.

REFERENCES:
patent: 4222009 (1980-09-01), Moulton et al.
patent: 4400667 (1983-08-01), Belkin
patent: 4422176 (1983-12-01), Summers

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