Clock acquisition in a spread spectrum system

Details Clock acquisition in a spread spectrum system Clock acquisition in a spread spectrum system

1990-01-30

1992-03-03

Gregory, Bernarr E.

Pulse or digital communications

Repeaters

Testing

380 34, 380 48, 375114, 375116, 375120, H04L 2730

Patent

active

050938410

ABSTRACT:
A circuit and method is disclosed for recovering the transmitter clock at a receiver in a direct sequence spread spectrum communication system where a transmitter and receiver run independent clocks of nominally the same frequency. At the receiver, to select the phase of the local clock that yields the strongest signal, a clock recovery circuitry cycles through M phases of the locally generated receiver clock. The cycling is halted and the phase is locked soon as an indication is obtained that a phase is valid. Alternatively, all M phases of the local clock are tested for validity or invalidity, and depending on the resulting pattern of valid and invalid phases, a particular phase is selected for the local clock. A phase is valid or invalid depending on whether there is a second correlation crossing at the expected instant one data bit period after a first correlation crossing.

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patent: 4639932 (1987-01-01), Schiff
patent: 4774715 (1988-09-01), Messenger
patent: 4862484 (1989-08-01), Roberts

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