Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Reexamination Certificate
2000-12-22
2004-09-14
Sircus, Brian (Department: 2836)
Electricity: electrical systems and devices
Safety and protection of systems and devices
Load shunting by fault responsive means
Reexamination Certificate
active
06791808
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a device for protection against overvoltages.
2. Discussion of the Related Art
Conventionally, electronic circuits, for example integrated circuits, include a large number of inputs, and voltage peaks associated with overvoltages on the connection lines or with electrostatic discharges are likely to occur on each of these inputs. Thus, conventionally, as illustrated in
FIG. 1
, each of the sensitive inputs
2
of an integrated circuit
1
is associated with a protection device
3
, which is shown in
FIG. 1
in the form of an avalanche diode.
The sole case where a positive overvoltage is likely to occur on input
2
has been considered in FIG.
1
. Conventionally, those skilled in the art will be able to provide systems enabling elimination of negative overvoltages.
Further, apart from protection devices of clipping type such as avalanche diode
3
illustrated in
FIG. 1
, there also exist breakover type devices in which, after an overvoltage, the voltage across the device drops to a value close to zero. An example of a breakover device is a Shockley diode. In practice, the user will choose to use a clipping device (avalanche diode) or a breakover device (Shockley diode) according to his needs and to the general circuit structure. Only clipping-type protection devices will be considered herein.
FIG. 2
shows the current-voltage characteristic of a clipping device, for which breakdown voltage VBR is on the order of 17 volts. Components capable of conducting relatively high currents are considered. Curves between 1 and 4 amperes have been shown as an example. The ideal curve of a clipping device would be the curve shown in dotted lines under reference
10
. In practice, a clipping component always has a certain positive dynamic resistance, and the phenomenon is enhanced for a given component when heating up. Thus, for example, a component having a breakdown voltage of 17 volts will see the clipping voltage thereacross, V
CL
, increase to for example 20 volts when the current flowing therethrough reaches four amperes. This increase of the actual voltage across clipping components is a significant disadvantage. Indeed, the component's breakdown voltage is chosen while taking account of two limits. Voltage V
BR
must be greater than the maximum normal voltage likely to reach input terminal
2
. On the other hand, it must be smaller than the voltages capable of damaging the components located behind input
2
. In fact, in many cases, this margin is very reduced. Further, current standards require protection of certain circuits against particularly high overvoltages capable of conducting relatively intense currents in the protection device. It is thus important to avoid as much as possible that the voltage across the clipping component after its avalanching becomes greater than the chosen breakdown voltage V
BR
.
A solution to reduce the difference between voltages VCL and VBR consists of increasing the diode surface. Indeed, a diode having a surface five times larger than another one will exhibit, for a given current, a difference V
CL
−V
BR
five times as small, but it will cost substantially five times as much.
SUMMARY OF THE INVENTION
An object of the present invention is to solve this problem.
To achieve this and other objects, the present invention provides a clipping device intended for absorbing current peaks from 1 to 10 amperes, formed of a vertical NPN transistor having an unconnected base, an emitter connected to a terminal on which positive voltage peaks are likely to appear, and a grounded collector, the transistor parameters being set so that it exhibits a negative dynamic resistance.
According to an embodiment of the present invention, the base resistance is smaller than 1500 ohms/square.
According to an embodiment of the present invention, the relative arrangement of the emitter and of the base is such that the breakdown occurs in volume.
According to an embodiment of the present invention, the emitter extends beyond the base and the emitter periphery is surrounded with a P-type region more lightly doped than the base.
According to an embodiment of the present invention, the base extends beyond the emitter, the emitter periphery being formed of a lightly-doped N-type region.
It should be noted that it has already been provided to use an NPN transistor operating as a diode, its base being unconnected, and a positive voltage with respect to the collector being applied to the emitter, for example in European patent application EP-A-088 1693 (B3564) or in Japanese patent application 5561828 filed on Nov. 1, 1978. Both of these applications are hereby incorporated by reference. However, these documents provide the use of such components as a voltage reference. There is thus in fact no relation with the envisaged applications. Indeed, a voltage reference is intended for exhibiting a very vertical characteristic, similar to characteristic
10
shown in
FIG. 2
, but only over a current range from a few microamperes to a few milliamperes while the present invention relates to protection components that can conduct currents of several amperes. The transistors provided in the two mentioned documents would in fact have, for currents on the order of one ampere, a clipping characteristic with a positive dynamic resistance.
The foregoing objects, features and advantages of the present invention, will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings.
REFERENCES:
patent: 4262295 (1981-04-01), Okano et al.
patent: 4405932 (1983-09-01), Ishii et al.
patent: 5083185 (1992-01-01), Hayashi et al.
patent: 5374843 (1994-12-01), Williams et al.
patent: 5751531 (1998-05-01), Rault
patent: 5929502 (1999-07-01), Beasom
patent: 0 881 693 (1998-12-01), None
French Preliminary Search Report from French application No. 99 16602, filed Dec. 28, 1999.
Patent Abstracts of Japan vol. 004, No. 103 (P-020), Jul. 23, 1980 and JP 55 061828.
U.S. application S.N. 09/083,355 filed on May 22, 1998 corresponding to EP 0 881 693, now abandoned.
Bernier Eric
Pezzani Robert
Demakis James A.
Jorgenson Lisa K.
Morris James H.
Sircus Brian
STMicroelectronics S.A.
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