Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Device held in place by clamping
Reexamination Certificate
2001-08-24
2004-05-04
Zarabian, Amir (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Device held in place by clamping
C257S726000, C438S015000, C438S106000, C438S121000
Reexamination Certificate
active
06730999
ABSTRACT:
BACKGROUND OF THE INVENTION
1. The Field of the Invention
The present invention relates to chip carrier devices for temporarily securing semiconductor chips to testing circuitry. In particular, the present invention relates to chip carriers that use C-shaped clips for providing a force on a semiconductor chip in order to temporarily secure the semiconductor chip to electrical contact points on the chip carrier.
2. The Relevant Technology
Frequently, after a semiconductor chip such as an integrated circuit is manufactured, a testing process is conducted on the semiconductor chip by subjecting it to a preselected set of input conditions in order to measure its response and other parameters. The testing process typically involves connecting electrical contact elements of the semiconductor chip to corresponding electrical contact structures on a testing device. Moreover, the connection made with the external circuitry is temporary such that the semiconductor chip may be subsequently removed and shipped to the consumer or used in a manufactured product.
As devices integrated in semiconductor chips continue to become smaller and more tightly packed, it has become increasingly difficult to establish electrical contact between semiconductor chips and external circuitry in testing devices. This is primarily due to the fact that the electrical contact elements and the pitch between nearest adjacent electrical contact elements on the semiconductor chips have progressively become smaller. It has been difficult and expensive to design testing devices that have electrical contact structures that are sufficiently small to be compatible with the contact elements of conventional semiconductor chips.
Some of the difficulties associated with testing conventional semiconductor chips have been addressed by using devices known as chip carriers or interposers. A typical chip carrier includes a printed circuit board or another dielectric substrate having electrical traces leading from an array of first contact points on a bottom surface thereof to an array of second contact points on the top surface thereof. The second contact points are typically tightly spaced so as to correspond to the contact elements of the semiconductor chip. In contrast, the first contact points have a greater pitch, or are more widely spaced, in order to electrically engage the external circuitry contained in the testing device.
In practice, testing operations are typically conducted by first temporarily securing a semiconductor chip to the chip carrier. This generally requires aligning the semiconductor chip with the chip carrier such that the contact elements of the semiconductor chip are in contact with the corresponding contact points of the chip carrier. Because the connection should be temporary for testing purposes, the semiconductor chip is normally pressed onto the chip carrier without being soldered thereto. In the past, structures such as that seen in
FIG. 1
have been used to temporarily secure the semiconductor chip to the chip carrier. One example of the structure illustrated in
FIG. 1
is disclosed in U.S. Pat. No. 5,367,253 to Wood et al. Substrate
10
has a first surface
12
with an array of first contact points
14
and an opposite second surface
16
with an array of second contact points
18
. A semiconductor chip
20
is disposed on second surface
16
such that electrical contact elements
22
of semiconductor chip
20
are connected with second contact points
18
.
In order to temporarily secure semiconductor chip
20
onto substrate
10
, bridge structures
24
have commonly been used. The bridge structure may include support members in contact with substrate
10
for stabilizing bridge structure
24
. Support members
26
may be attached to substrate
10
by means of slots (not shown) in the side of substrate
10
or by gripping first surface
12
of substrate
10
. Furthermore, the bridge structure may include a substantially planar plate
28
attached to the support members
26
. A leaf spring
30
is attached to plate
28
and extends to semiconductor chip
20
. As bridge structure
24
is positioned on substrate
10
and is placed in contact with semiconductor chip
20
, the leaf spring
30
is compressed toward plate
28
and exerts a downward force
32
onto semiconductor chip
20
, thereby holding it in place over substrate
10
.
While bridge structure
24
often functions suitably well for its intended purpose, there are some instances in which another system for temporarily holding a semiconductor chip on a substrate could be desirable. For example, as seen in
FIG. 1
, bridge structure
24
ordinarily extends a considerable distance above semiconductor chip
20
. Often, however, it is desirable to reduce the amount of space above the semiconductor chip that must be occupied by the clamping apparatus in order to temporarily secure the semiconductor chip to testing circuitry.
In view of the foregoing, there is a need in the art for an improved structure for temporarily securing a semiconductor chip to testing circuitry. In particular, it would be advantageous to provide a chip carrier for securing a semiconductor chip while greatly reducing the amount of space needed above the semiconductor chip.
SUMMARY OF THE INVENTION
The present invention relates to chip carriers that used C-shaped clips for generating a force on a semiconductor chip in order to temporarily secure the semiconductor chip to contact points on a chip carrier. The clips generally do not extend to the region directly over the semiconductor chip. Preferably, the clips are instead positioned to the sides of the semiconductor chip and are placed in contact with a cover member that extends over the semiconductor chip. The clips exert a downward force on the cover member, which in turn presses the semiconductor chip onto the chip carrier substrate. The clips conveniently allow the semiconductor chip to be secured to and later removed from the substrate in connection with a testing procedure.
In one embodiment of the invention, the chip carrier includes a dielectric substrate having at least a first layer, which includes a printed circuit board or another suitable structure, such as a polyimide layer. Preferably, the substrate further includes a second layer on the first layer. The first layer has an array of first contact points on a lower surface thereof. The first contact points may be solder balls of a ball grid array, pins of a pin grid array, land pads of a land grid array, or the like, depending on the nature of the testing device to be used with the chip carrier. The second layer has an array of second contact points on a surface thereof Alternatively, the substrate includes only the first layer, in which case the second contact points are arrayed over a surface of the first layer opposite the first contact points.
In either case, electrical traces connect the first contact points with the second contact points. Preferably, the first contact points are more widely spaced and have a greater pitch than the second contact points. This allows the electrical contact elements of semiconductor chip to effectively have an increased pitch when attached to the chip carrier, thereby facilitating the establishment of electrical connection with external circuitry of the testing device.
One method for using the chip carriers and the clips of the invention involves first positioning a semiconductor chip on the substrate such that contact elements of the semiconductor chip are connected with the second contact points of the substrate. A cover member is then disposed on the semiconductor chip opposite the contact elements thereof. The cover member may have a resilient layer at the interface with the semiconductor chip so as to provide a cushioning effect as the cover member presses down on the semiconductor chip.
The force by which the cover member presses down on the semiconductor chip is generated by one or more C-shaped clips compressively attached to the substrate. Preferably, the chip carrier utilizes at least two clips and most pre
Farnworth Warren M.
Gochnour Derek
Wood Alan
Micro)n Technology, Inc.
Vockrodt Jeff
Workman Nydegger
Zarabian Amir
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