Clear processing of a translation lookaside buffer with less wai

Details Clear processing of a translation lookaside buffer with less wai Clear processing of a translation lookaside buffer with less wai

1997-08-01

1999-07-27

Eng, David Y.

Electrical computers and digital processing systems: processing

Architecture based instruction processing

G06F 930

Patent

active

059283530

ABSTRACT:
A TLB clear control system, in a multiprocessor system including a main memory and a plurality of processors, each of which has a translation lookaside buffer (TLB), includes a decoding unit for sequentially decoding each of instructions, an instruction executing unit, a TLB clearing unit, a communication unit for communicating with the other processors, a determining unit for determining whether or not the decoded instruction is one of instructions requiring to clear or update the TLB, and an execution control unit for controlling the instruction executing unit to execute the decoded instruction when it is determined by the determining unit that the decoded instruction is not any one of instructions requiring to clear or update the TLB, and for controlling the TLB clearing unit to clear the TLB when it is determined by the determining unit that the decoded instruction is one of the instructions requiring to clear or update the TLB, for controlling the communication unit to transmit a TLB clear request, and controlling the decoding unit to decode the next instruction without waiting for TLB clear processing end notices from the other processors after the TLB clear request is transmitted when it is determined that the decoded instruction is any one of the instructions requiring to clear the TLB.

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P. Teller, "Translation-Lookaside Buffer Consistency", Computer, vol. 23, No. 6, Jun. 1990, pp. 26-36.

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