Clean room arrangement for electron beam lithography

Details Clean room arrangement for electron beam lithography Clean room arrangement for electron beam lithography

2001-07-23

2003-12-30

Meier, Stephen D. (Department: 2853)

Radiant energy

Irradiation of objects or material

Irradiation of semiconductor devices

C250S492210

Reexamination Certificate

active

06670621

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to the fabrication of semiconductor devices by means of electron beam lithography and is particularly directed to a clean room arrangement for use in the manufacture of semiconductor devices using electron beam lithography.
BACKGROUND OF THE INVENTION
Photolithography is commonly used in the manufacture of semiconductor devices. In this approach, the image of a reticle is reproduced by a light source such as of ultraviolet (UV) light onto a photosensitive resist-covered semiconductor substrate, or wafer. Another approach has also been adopted in the fabrication of semiconductor devices. This latter approach employs an electron beam directed onto the semiconductor substrate for tracing out the desired integrated circuit pattern. Because this electron beam lithography technique must be performed in a very carefully controlled environment, the process is carried out in an ultra clean room. The ultra clean room contains, by definition, an extremely low number of contaminant particles per unit volume. Controlling the semiconductor device manufacturing environment to the extent of essentially being contaminant-free involves complicated engineering solutions which are expensive. The cost increases with the size of the ultra clean room.
Referring to
FIG. 1
, there is shown a simplified illustration of a conventional arrangement for the manufacture of semiconductor devices incorporating an ultra clean room
10
as encountered in the prior art. Ultra clean room
10
is shown as being rectangular in shape, having a width “a” and a length “b”. Ultra clean room
10
is defined by first, second, third and fourth walls
12
a
,
12
b
,
12
c
and
12
d
as well as a floor
12
e
and a ceiling which is not shown in the figure for simplicity. Disposed within the ultra clean room
10
and arranged in a spaced manner are plural vacuum stations
14
a
,
14
b
,
14
c
. . .
14
n
within which the semiconductor devices incorporating integrated circuits are formed. Ultra clean room
10
provides a sealed environment for the manufacture of semiconductor devices within the room. Ultra clean room
10
is characterized as having an environment which is essentially contaminant free. For example, a Class 1 clean room is defined as having no more than one (1) contaminant particle per cubic foot of volume. Similarly, a Class 100 clean room is characterized as having no more than one hundred (100) contaminant particles per cubic foot of volume. Various sophisticated filtering and air purifying systems are used to remove contaminants from the ultra clean room
10
. The lower the class of the ultra clean room, the more extensive and expensive is the air filtering and purifying system required to remove greater numbers of contaminant particles. In addition, the larger dimensions of the clean room, the more extensive and expensive is the air filtering and purifying system required to remove the contaminant particles from the larger volume of air.
The present invention addresses the aforementioned limitations of the prior art by providing an ultra clean room arrangement for use in the fabrication of semiconductor devices by electron beam lithography which reduces the cost associated with the ultra clean room by reducing its size and complexity.
OBJECTS AND SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide apparatus for electron beam lithography such as used in the manufacture of semiconductor devices.
It is another object of the present invention to provide a clean room arrangement such as is used in the fabrication of high density semiconductor integrated circuits which is of reduced cost to manufacture and operate, is adapted for large volume integrated circuit production, and affords increased flexibility in the manufacturing process.
Yet another object of the present invention is to simplify and reduce the costs of manufacturing semiconductor devices by reducing the size and complexity of the controlled environment space within which the devices are manufactured.
The present invention contemplates an arrangement for forming integrated circuits on a semiconductor substrate comprising: a first clean room characterized as containing a first reduced level of contaminants; plural vacuum stations arranged in a spaced manner in common alignment; a semiconductor substrate disposed at each vacuum station; plural electron beam sources disposed at each vacuum station and aligned with the semiconductor substrate for directing electron beams onto an associated semiconductor substrate for forming integrated circuits thereon; and a transport mechanism connected to the first clean room or to the plural vacuum stations for sequentially positioning each vacuum station in the first clean room to permit substrates having integrated circuits formed thereon when the vacuum station is not in the first clean room to be removed from the vacuum station in the first clean room and replaced by another substrate.


REFERENCES:
patent: 4831270 (1989-05-01), Weisenberger
patent: 5004924 (1991-04-01), Imahashi
patent: 6236163 (2001-05-01), Maishev et al.

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