Amplifiers – Modulator-demodulator-type amplifier
Reexamination Certificate
1999-06-29
2001-02-20
Mottola, Steven J. (Department: 2817)
Amplifiers
Modulator-demodulator-type amplifier
C330S20700P
Reexamination Certificate
active
06191650
ABSTRACT:
The invention concerns a class D amplifier as disclosed in the preamble to claim
1
.
Where a wide range of portable products within telecommunication, video and audiometrics are concerned, as well as hearing aids and other micro-electronics, the weight and the physical dimensions of the equipment play an important role for the equipment's field of application and marketability.
The power consumption belongs typically among the important factors which are determinative for precisely the weight and the physical dimensions of the portable equipment. Therefore, in many connections it is decisive that attempts are made to reduce the power consumption as much as possible.
The function of a class D amplifier involves pulse width modulation of a constant, high-frequency signal by a proper signal, e.g. an audio signal. The modulated signal is dissipated across a load, such as a loudspeaker, and since the high-frequency signal is of a considerably higher frequency than the transfer range of the low-pass filter which constitutes the load, the high-frequency modulation components are filtered out.
Class D amplifiers are characterized by being built up of a small number of components and by consuming very little current in comparison with, for example, class AB amplifiers.
However, a typical problem with known class D amplifiers is that a relatively high DC idling current flows through the load when there is no signal.
In patent publication no. U.S. Pat. No. 5,352,986 there is disclosed a class D amplifier where the idling current is minimized by feeding back a signal which is derived from the average respective pulse times of two high-frequency pulses of opposite polarity which are pulse width modulated and used to drive the power stage for a coupled load. Compensation is hereby made for the offset errors which can arise in connection with the analog components in the pulse width modulator, and which lead to undesired no-signal DC current through the load.
This document forms the basis of the introductory part of claim
1
.
However, the circuit according to U.S. Pat. No. 5,352,986 is not considered to be able to provide a sufficiently precise compensation for DC currents through the load.
It is a primary object of the above-mentioned invention to further reduce the DC error in a class D amplifier with DC feedback.
It is a further object of the invention to minimize as much as possible the use of analog circuit elements and hereby reduce the cost of the production of the coupling, e.g. by the implementation of ASIC design in a large part of the circuit, and to a wide extent to reduce or completely avoid adjustment and calibration of the coupling.
These objects are achieved with the invention as defined in claim
1
.
The class D amplifier achieved herewith is one with particularly high efficiency and low production costs.
With the present coupling, there is achieved a DC error current which is typically less than 0.1% of the peak level.
The coupling requires no adjustment and is extremely temperature stable.
Moreover, the coupling displays a very low degree of cross-over distortion, which is normally most appreciable at low signal levels.
For the known class D amplifiers, operation is typically effected with a certain time overlap in order to reduce the cross-over distortion. If the input signal is under a certain limit, there are still generated signals which are short and which are at both outputs simultaneously. Otherwise there would be a dead band where a signal change from no-signal to a certain lower signal level will cause a stepped change in the output signal. The present coupling makes it possible to reduce the time overlap by many powers of 10, so that the no-signal current consumption is correspondingly reduced.
Furthermore, there is also achieved a certain saving in current in that the complexity of the error adjustment circuit is greatly reduced.
REFERENCES:
patent: 4689819 (1987-08-01), Killion
patent: 5014016 (1991-05-01), Anderson
patent: 5115205 (1992-05-01), Holmes, Jr.
patent: 5352986 (1994-10-01), Modgil et al.
patent: 5805020 (1998-09-01), Danz et al.
patent: 6014055 (2000-01-01), Chester
patent: 57-97710 (1982-06-01), None
Backram Hans-Erik
Backram Lars
Gustafsson Börje
Altera Law Group LLC
G/N Netcom A/S
Mottola Steven J.
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