Class D amplifier with passive RC network

Amplifiers – Modulator-demodulator-type amplifier

Reexamination Certificate

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Details

C330S20700P, C330S251000, C330S291000, C330S118000

Reexamination Certificate

active

06621335

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention relates to an efficient audio signal amplifier and, more specifically, to a Class D amplifier using a passive resistive-capacitive (RC) network. More specifically, the present invention relates to Class D amplifier device utilizing a passive RC network that reduces current consumption and increases efficiency. The use of selectable output stages also reduces current consumption.
BACKGROUND OF THE INVENTION
Class D amplifiers are in widespread use for a variety of applications. In audio applications, for example, the Class D amplifier has become an attractive alternative for applications that require high efficiency and low distortion. U.S. Pat. No. 4,689,819 to Killion describes the use of a Class D amplifier in a hearing aid application. In hearing aid applications, a premium is placed on the ability of the device to operate as close as possible to distortion free while maintaining suitable levels of amplifier performance.
A problem associated with prior art Class D amplifier devices is the use of active feedback loops that utilize substantial amounts of power.
FIG. 1
illustrates a prior art class D amplifier circuit, denoted as
10
, wherein a traditional feedback loop is established between the output and the input using an error amplifier. Essentially, circuit
10
uses an output stage
12
with an H-bridge output stage delivering output
14
that, in turn, drives load
16
. The output signal
14
is coupled to the feedback loop
16
comprising of feedback impedance
18
which forms an input to error amplifier
20
. The use of error amplifier
20
in a class D amplifier circuit, such as circuit
10
, is well known in the industry. The output of the error amplifier
20
is fed to a comparator circuit
22
which, in turn, is driven by the
391
wave generator
24
which provides a clock signal for operating the output stage
12
, and specifically for controlling the duty cycle of the output stage
12
. Thus, the input signal
26
and feedback signal
16
are summed and provided to the error amplifier
20
which controls the stability of the circuit
10
and amplitude of the output signal
14
as a function of the feedback impedance
18
over the input impedance
28
.
In a Class D amplifier circuit, such as circuit
10
, the input and feedback signals are normally summed in an amplifier, such as error amplifier
20
. This increases power consumption since the amplifier
20
is an active device requiring current to operate. Moreover, since the output stage
12
is always operating, power consumption at the output can be significant even for small signals outside the audible range. Accordingly, a Class D amplifier device with reduced internal power consumption would provide numerous advantages.
SUMMARY OF THE INVENTION
The present invention provides a Class D amplifier device with reduced power consumption. Essentially, power consumption is minimized by the use of a passive RC network. The output of the RC network directly feeds a comparator resulting in increased efficiency for low power audio applications. The RC network is configured to perform several functions, including the low pass filtering of the feedback signal to remove high frequency/high amplitude clock signals. In addition, the RC network provides a DC path from its output to reduce duty cycle errors. Additionally, the input signal receives low pass filtering, creating a generally flat frequency response. Finally, the clock signal is filtered to generate a triangle wave of good linearity and appropriate amplitude.
According to another embodiment, the present invention provides a Class D amplifier device with selectable output stages having gate drives that activate, depending on the load impendance and signal level, and therefore optimize current consumption and efficiency. By separating the gate drives into upper and lower stages, only those that are enabled corresponding to a suitable signal level amplitude are active, limiting consumption by other gate drive circuits in the output stage.
A technical advantage of the present invention is reduced current consumption by the driving stage in a Class D amplifier circuit.
Another technical advantages of the present invention is increased efficiency by the use of a passive RC network to generate the appropriate drive signals to the output.


REFERENCES:
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patent: 4978959 (1990-12-01), Chong et al.
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patent: 5815581 (1998-09-01), Andersson
patent: 5838193 (1998-11-01), Myers et al.
patent: 6016075 (2000-01-01), Hamo
patent: 6249182 (2001-06-01), Pullen
patent: 6320460 (2001-11-01), Meszlenyi
patent: 6346852 (2002-02-01), Masini et al.
patent: 6441760 (2002-08-01), Albinet et al.
patent: 2002/0153947 (2002-10-01), Andersson
patent: 483094 (1992-04-01), None
patent: 5152867 (1993-06-01), None
Tan et al. “Novel self-error-correction pulse width modulator for a class D hearing instrument amplifier” IEEE Proceedings on Circuits, Devices and Systems, vol. 148 Issue 5, Oct. 2001 pp. 261-266.

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