Amplifiers – Modulator-demodulator-type amplifier
Reexamination Certificate
2002-09-20
2004-02-24
Nguyen, Khanh Van (Department: 2817)
Amplifiers
Modulator-demodulator-type amplifier
C330S20700P, C330S251000
Reexamination Certificate
active
06696891
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a class D amplifier, and more particularly to a class D amplifier which is suitable for amplifying the power of an audio signal.
As one of conventional class D amplifiers, known is a separately excited PWM amplifier shown in FIG.
8
. In the figure,
101
denotes a carrier signal generator,
102
denotes an input terminal,
103
denotes an adder,
104
denotes a voltage comparator,
105
denotes a pulse amplifier,
106
and
106
′ denote switching elements,
107
denotes a low-pass filter,
108
denotes a load, and
109
and
109
′ denote power source terminals.
FIG. 9
shows operation waveforms at various portions. In the figure, S
1
indicates a carrier signal, S
2
indicates an input signal, S
3
indicates a PWM signal, and S
4
indicates an output signal.
In the configuration, the adder
103
adds the triangular carrier signal S
1
which is generated by the carrier signal generator
101
, and the input signal S
2
. The output of the adder is supplied to the voltage comparator
104
.
The voltage comparator
104
compares the signal applied from the adder
103
with a reference voltage of a constant level, and outputs a result of the comparison. Consequently, the output of the voltage comparator
104
is the PWM signal S
3
which is obtained by pulse-width modulating the input signal S
2
. The PWM signal S
3
drives the switching elements
106
and
106
′ by using the pulse amplifier
105
as a driving circuit.
Positive and negative power source voltages of the same level are applied to the switching elements
106
and
106
′ via the power source terminals
109
and
109
′, respectively. Therefore, a signal which is similar to the PWM signal S
3
, and in which the positive and negative voltage values are equal to the positive and negative power source voltages applied to the switching elements
106
and
106
′ is applied to the input of the low-pass filter
107
. The low-pass filter
107
removes from the signal the high frequency components due to the carrier signal S
1
, and supplies a power-amplified output signal S
4
which is similar to the input signal S
2
, to the load.
Another conventional class D amplifier is a 1-bit amplifier.
FIG. 10
shows the configuration of a 1-bit amplifier. Referring to the figure, the 1-bit amplifier
200
has an adder
201
, an integrator
202
, a comparator
203
having hysteresis characteristics, and a delay circuit
204
. The reference numeral
205
denotes an input terminal to which an analog signal is input, and
206
denotes an output terminal from which a 1-bit data is output.
In the configuration, the analog signal X input through the input terminal
205
, and a quantized signal +V or −V which is output from the delay circuit
204
, and which corresponds to 1 bit are added to each other by the adder
201
. The output of the adder
201
is integrated by the integrator
202
, and then supplied to the comparator
203
. In the comparator
203
, the incoming output of the integrator
202
is compared with a reference voltage. If the output polarity is plus, the digital output is 1, and the maximum value +V of the analog input which is to be A/D converted is fed back as a quantized output to the adder
201
.
If the output polarity is minus, the digital output is 0, and −V is fed back as a quantized output to the adder
201
. In this way, a 1-bit output Y such as shown in
FIG. 11
is output from the 1-bit amplifier
200
.
Among the above-mentioned conventional class D amplifiers, the separately excited PWM amplifier cannot be configured so as to negatively feed back the output of the amplifier to the input side, and hence has a problem in that it is difficult to improve the S/N ratio and reduce the distortion factor. In a self excited PWM amplifier, the S/N ratio can be improved, and the distortion factor can be reduced, but there is a problem in that the oscillation frequency cannot be controlled.
Among the conventional class D amplifiers, the 1-bit amplifier must be operated at a very high switching frequency in order to improve the S/N ratio and reduce the distortion factor, thereby producing a problem in that the amplifier is disadvantageous from the viewpoints of the amplifier efficiency, the audio performance, etc.
SUMMARY OF THE INVENTION
The invention has been conducted in view of the circumstances. It is an object of the invention to provide a class D amplifier in which the S/N ratio and the reduction of the distortion factor can be improved.
In order to solve the aforesaid object, the invention is characterized by having the following arrangement.
(1) A class D amplifier comprising:
an integrating circuit for integrating an input signal;
a flash A/D converter for A/D converting an output signal of the integrating circuit;
a waveform converting circuit for producing a PWM signal including a pulse width corresponding to a digital value output from the flash A/D converter;
a switching circuit, for producing an amplified signal, including a pair of switching elements connected between a first power source and a second power source, a junction portion of the pair of switching elements being connected to a load;
a driving circuit for driving the pair of switching elements on the basis of the PWM signal output from the wave form converting circuit; and
a feedback circuit which is connected between the junction point of the pair of switching elements and an input side of the integrating circuit, and negatively feeds back the amplified signal that is to be supplied to the load.
(2) The class D amplifier according to (1), wherein the waveform converting circuit includes:
a storing unit for storing waveform information of the PWM signal of a pulse width corresponding to the digital value;
a reading unit for reading out the waveform information of the PWM signal from the storing unit on the basis off the digital value output from the flash A/D converter; and
an outputting unit for outputting the PWM signal on the basis of the waveform information which is read out by the reading unit.
(3) The class D amplifier according to (1), wherein a low-pass filter for removing signal components of carrier frequency from the amplified signal is interposed between the junction potion of the pair of switching elements and the load, and the feedback circuit is connected to an input side of the low-pass filter.
(4) The class D amplifier according to (1), wherein the feedback circuit includes: a first feedback loop which allows high frequency components of the output signal that is to be supplied to the load, to pass; and a second feedback loop which allows low frequency components of the output signal to pass.
REFERENCES:
patent: 5949282 (1999-09-01), Nguyen et al.
patent: 5974089 (1999-10-01), Tipathi et al.
patent: 5986498 (1999-11-01), Rodriguez
patent: 61-21007 (1986-05-01), None
patent: 11-112245 (1999-04-01), None
Noro Masao
Sekimoto Yasuhiko
Nguyen Khanh Van
Pillsbury & Winthrop LLP
Yamaha Corporation
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