Amplifiers – With semiconductor amplifying device – Including differential amplifier
Reexamination Certificate
2001-12-13
2002-12-10
Nguyen, Patricia (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including differential amplifier
C330S265000, C330S267000
Reexamination Certificate
active
06492870
ABSTRACT:
FIELD OF THE INVENTION
This invention generally relates to electronic systems and in particular it relates to a class AB input stage.
BACKGROUND OF THE INVENTION
As the communications technology progresses into higher frequency bands, the requirements for speed in the analog front and back end increase. Operational Amplifier requirements for these applications are not only for a high small signals bandwidth, but also for a high large signals (dynamic) bandwidth. These new Operational Amplifiers need to be even faster than their predecessors in order to ensure low harmonic distortion at high speed.
Large signals bandwidth (BW), or full power bandwidth, is defined as: BW=Slew Rate/2*Vp, where Vp is peak voltage. In other words, the faster the slew rate of the Op Amp, the larger the large signals bandwidth. This also brings better distortion for large signals at high frequencies, mainly due to the fact that the Op Amp will be able to follow faster input signals before it becomes slew rate limited. It is also important to remember that the Op Amp must be power efficient, thus, preferably, only boosting its slewing current during the slewing transitions.
The typical prior art solution to these previously mentioned needs is the Class AB input stage. This topology has the advantage of consuming very low standing current (in absence of input signal or for a small signals input) but capable of boosting its slewing current in the presence of a “large signals” input stimulus.
The limitation of the conventional Class AB bipolar input stage is a base current limitation that translates into the well known non-linearities that typically are associated with this type of input stage. In other words, there is trade off, when setting this input stage, between available base current to drive the slewing transistor and standing current through those slewing transistors. The boosted slewing current is proportional to the input signal seen by the input stage. Typically the best setting has a low quiescent current and becomes base current limited half way through the slewing transition of the largest possible signal swing. Even with this set up the standing current ends up being substantial which is very inefficient, especially in the case of input signals smaller than the full dynamic input range of the Op Amp. The lack of base current to the slewing transistors translates to distortion, due to the time that the slewing transistor takes to turn “on” and return back to its quiescent biasing point after suddenly turning “off”.
An example of a prior art class AB input stage is shown in FIG.
1
. The circuit of
FIG. 1
includes transistors
20
-
31
; current sources
34
-
37
; resistors
40
-
44
; capacitor Cc; input nodes IN+ and IN−; source voltages V
CC
and V
EE
; and output node 46. Resistors
41
-
44
have the same value. The slew rate (SR) for the prior art circuit of
FIG. 1
is given by the following equation:
SR
=
&LeftBracketingBar;
V
in
+
-
V
in
-
&RightBracketingBar;
R
2
·
C
c
Vin+ is the voltage at node IN+. Vin− is the voltage at node IN−. R
2
is the resistance of resistor
40
. Notice that R
2
sets the transconductance (gm) of the input stage, which sets the small signals bandwidth, the open loop gain, noise, and large signals bandwidth. R
2
is typically set to be around 500 ohms. For a ±10V signal the slewing current is as much as 20V/500 ohm=40 mA. For a one volt step this current would be {fraction (1/500)}=2 mA.
To prevent the non-linearities associated with transistors saturating or turning off during slewing, transistors
20
-
27
cannot be allowed to ever turn off or even get extremely debiased during slewing. For a 20V step and 40 mA slewing current and beta of 80, the current I must be at least 500 mA, preferably twice that. A 1 mA standing current is wasted if the application never requires the opamp to amplify a signal larger than 1 V
pp
, where V
pp
is peak-to-peak voltage.
SUMMARY OF THE INVENTION
An improved Class AB input stage monitors the needs of base current in the slewing transistors and supplies that base current in an extremely fast and precise feedback loop. This allows the input stage quiescent current to be very small and gets rid of the non-linearities associated with the lack of base current available to drive the slewing transistors in a conventional prior art Class AB input stage. A very efficient, low distortion, high small signals and full power bandwidth Class AB input stage is provided.
REFERENCES:
patent: 5177451 (1993-01-01), Lehmann
patent: 5512859 (1996-04-01), Moraveji
patent: 5907262 (1999-05-01), Graeme et al.
patent: 6181204 (2001-01-01), Smith et al.
patent: 6278326 (2001-08-01), Murray et al.
patent: 0 963 038 (1999-12-01), None
Brady III Wade James
Nguyen Patricia
Stewart Alan K.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
LandOfFree
Class AB, high speed, input stage with base current... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Class AB, high speed, input stage with base current..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Class AB, high speed, input stage with base current... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2942332