Television – Image signal processing circuitry specific to television – Dc insertion
Patent
1991-10-31
1994-12-06
Groody, James J.
Television
Image signal processing circuitry specific to television
Dc insertion
348692, 341118, H04N 518
Patent
active
053715527
ABSTRACT:
A clamp circuit including a clamping capacitor and a differential amplifier charge and discharge the clamping capacitor in accordance with the magnitude of difference signals applied to the differential amplifier's inverting and non-inverting inputs. The inverting input receives the voltage produced by the clamping capacitor. This voltage is digitized by an analog-to-digital converter (ADC) and is set to a reference voltage range by a voltage divider network. The ADC output signal is compared to a given reference level corresponding to a selected voltage in the reference voltage range to produce a difference output signal. This difference output signal is summed with the selected voltage in the reference voltage range and applied to the non-inverting input of the differential amplifier to produce a clamp voltage with substantially minimum offsets due to the amplifier, ADC and DAC. A clamp enable signal operates the clamping circuit during a blanking interval of a video signal applied to the clamping capacitor. A digital processing circuit of a television receiver receives the video signal clamped to the level of the clamp voltage. Instead of processing the video signal at the clamped level, a blanking signal code word is inserted in the clamped video signal to save memory. The video signal applied to the digital processing circuit is thus clamped to the voltage level by the inserted code word.
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Asbury James F.
Brummette Steven C.
Culp Norman L.
Krenik William R.
Miller William G.
Goodman Edward W.
Groody James J.
Murrell Jeffrey S.
North American Philips Corporation
Texas Instruments Inc.
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