Clamping circuit for high-speed low-side driver outputs

Details Clamping circuit for high-speed low-side driver outputs Clamping circuit for high-speed low-side driver outputs

2005-10-18

2005-10-18

Ton, My-Trang Nu (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

C327S427000

Reexamination Certificate

active

06956425

ABSTRACT:
A clamp for a FET switch utilizes a surge detector to turn off one of two bias circuits for the FET. The first biasing circuit provides the current necessary for high speed switching. The second biasing circuit provides a lower biasing current. A resistor or other device is used to allow the measurement of BVdss on the integrated circuit where the surge detector is connected from a terminal of the conductive path of the FET to the gate thereof. The switching circuit allows the surge detector to turn on the FET to act as a self-clamp when there is a spike in the voltage applied to the FET, such as when turning off an inductive load.

REFERENCES:
patent: 5532635 (1996-07-01), Watrous et al.
patent: 5608595 (1997-03-01), Gourab et al.
patent: 5793232 (1998-08-01), Gallinari et al.
patent: 5838526 (1998-11-01), Ishikawa et al.
patent: 6169439 (2001-01-01), Teggatz et al.
patent: 6614633 (2003-09-01), Kohno

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