Clamping circuit for clamping a reference voltage at a predeterm

Electricity: power supply or regulation systems – Self-regulating – Using a three or more terminal semiconductive device as the...

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

G05F 316

Patent

active

054365520

ABSTRACT:
A clamping circuit includes a constant current circuit including a constant current source and a current mirror circuit a trimmable resistance receiving a constant current from the constant current circuit, and a clamping MOS transistor receiving a voltage generated by the trimmable resistance at its gate to regulate a current flowing through a clamping node. It is possible to make rapid a current-voltage characteristic of the clamping circuit, and to set an arbitrary clamping potential.

REFERENCES:
patent: 4874967 (1989-10-01), Deane
patent: 4926065 (1990-05-01), Coy et al.
patent: 5132936 (1992-07-01), Keswick et al.
patent: 5311071 (1994-05-01), Ueda
"Analog Integrted Circuit Design Technology for VLSI", by P. R. Gray, et al, Analysis and Design of Analog Integrated Circuits 2nd Edition, John Wiley & Sons Publishing (A Japanese copy).

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Clamping circuit for clamping a reference voltage at a predeterm does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Clamping circuit for clamping a reference voltage at a predeterm, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clamping circuit for clamping a reference voltage at a predeterm will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-742088

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.