Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control
Reexamination Certificate
2000-06-15
2002-03-19
Cunningham, Terry D. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Amplitude control
C327S314000, C327S333000
Reexamination Certificate
active
06359490
ABSTRACT:
FIELD OF THE INVENTION
The present invention pertains to a clamping circuit for restricting the voltage of the input signal to a prescribed range, and interface circuit that makes use of said clamping circuit.
BACKGROUND OF THE INVENTION
In the prior art, in order to increase the ESD (Electrostatic Discharge) voltage rating and to suppress the reflected noise for the interior of IC, wiring of PCB (Printed Circuit Board), etc., a diode clamping circuit or Schottky barrier diode clamping circuit is used.
FIG. 7
is a diagram illustrating an example of the Schottky barrier diode clamping circuit.
As shown in
FIG. 7
, this clamping circuit is composed of Schottky barrier diodes (referred to as diodes hereinafter) D
1
and D
2
connected in series between the supply line of power source voltage V
cc
and ground voltage GND.
The anode of diode D
1
is connected to input terminal T
in
, and its cathode is connected to the supply line of power source voltage V
cc
. The anode of diode D
2
is grounded, and its cathode is connected to input terminal T
in
.
In this case, if the forward rise voltage of diode D
1
is V
D1
, and signal voltage V
in
of input terminal T
in
satisfies the condition V
in
>V
cc
+V
D1
, diode D
1
becomes conductive, voltage V
in
of input terminal T
in
is clamped to a level above power source voltage V
cc
by the conductive voltage of diode D
1
.
If the forward rise voltage of diode D
2
is VD
2
, and signal voltage V
in
of input terminal T
in
satisfies the condition V
in
<VD
2
, diode D
2
becomes conductive, and voltage V
in
of input terminal T
in
is clamped to a level below ground voltage GND by the conductive voltage of diode D
1
.
FIG. 8
is a diagram illustrating the clamping characteristics of the clamping circuit shown in FIG.
7
. As shown in the figure, this clamping circuit may be connected to the terminal of a signal transmission line to clamp the terminal voltage of the signal transmission line from a voltage slightly below ground voltage GND to a voltage slightly above power source voltage V
cc
. In this way, it is possible to prevent reflection of the signal at the terminal of the transmission line and to inhibit generation of reflected noise on the transmission line.
However, in the aforementioned conventional clamping circuit, the range of the clamping voltage depends on power source voltage V
cc
and the conductive voltage of the diode used in the clamping circuit, and it is impossible to set the clamping voltage at will. Also, due to the conductive voltage of the diode, the clamping voltage range shifts a little from power source voltage V
cc
and ground voltage GND. For example, when voltage V
in
at input terminal T
in
is to be clamped between ground voltage GND and power source voltage V
cc
, voltages
Vc1
and V
c2
should be supplied to the cathode of diode D
1
and the anode of diode D
2
,respectively, as shown in FIG.
9
. Consequently, voltage sources for generating said voltages V
c1
and V
c2
must be arranged separately. This is undesirable for the terminal circuit which should have a simple circuit configuration.
The purpose of the present invention is to solve the aforementioned problems of the conventional technology by providing a clamping circuit which has a simple circuit configuration and which can set the clamping voltage range at will, and an interface circuit that makes use of said clamping circuit.
SUMMARY OF THE INVENTION
In order to realize the aforementioned purpose, the present invention provides a type of clamping circuit characterized by the following facts: the clamping circuit has a first circuit containing a first transistor and a first diode electrically connected in series between the input terminal and the fit voltage feed line, and a first voltage feed terminal for feeding the first voltage to the control terminal of said first transistor; when the voltage between said first voltage feed terminal and said input terminal reaches a prescribed level, said first transistor becomes conductive and the voltage of said input terminal is clamped.
Also, the clamping circuit of the present invention is characterized by the following facts: the clamping circuit has a first circuit containing a first transistor and a first diode electrically connected in series between said input terminal and the first voltage feed line, a first voltage feed terminal for feeding the first voltage to the control terminal of said first transistor, a second circuit containing a second transistor and a second diode electrically connected in series between said input terminal and the second voltage feed line, and a second voltage feed terminal for feeding the second voltage to the control terminal of said second transistor; when the voltage between said first voltage feed terminal and said input terminal or the voltage between said second voltage feed terminal and said input terminal reaches a prescribed level, said first or second transistor becomes conductive and the voltage of said input terminal is clamped.
Also, the clamping circuit in the present invention is preferably characterized by the following facts: it has a first, a second and a third resistive element connected in series between said first voltage feed line and said second voltage feed line; the connection point between said first resistive element and said second resistive element forms said first voltage feed terminal; and the connection point between said second resistive element and said third resistive element forms said second voltage feed terminal.
Also, the clamping circuit of the present invention is preferably characterized by the following facts: the cathode of said first diode is connected to said input terminal; said first transistor is connected between the anode of said first diode and said first voltage feed line; the anode of said second diode is connected to said input terminal; said second transistor is connected between the cathode of said second diode and said second voltage feed line; the power source voltage is fed to said first voltage feed line; and the ground voltage is fed to said second voltage feed line.
The interface circuit of the present invention is characterized by the following facts; the interface circuit has a signal line, a drive circuit which has its output terminal connected to said signal line and is for driving said signal line to the prescribed voltage, an input circuit which has its input terminal connected to said signal line and operates corresponding to the voltage of said signal line, and a clamping circuit connected to the input terminal of said input circuit.
REFERENCES:
patent: 5237213 (1993-08-01), Tanoi
patent: 5323071 (1994-06-01), Hirayama
patent: 5583460 (1996-12-01), Dohi et al.
patent: 5929688 (1999-07-01), Ueno et al.
Cunningham Terry D.
Kempler William B.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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