Clamping circuit

Details Clamping circuit Clamping circuit

1999-05-17

2000-10-24

Nguyen, Matthew

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

G05F 316

Patent

active

061372781

ABSTRACT:
A clamping circuit is described which prevents an input signal present on an input path from being able to assume a negative potential. The circuit is distinguished by a high voltage endurance in conjunction with accurate adherence to the clamping voltage and, at the same time, a low current consumption in the normal mode. The clamping circuit contains cross-coupled first and second transistors and can be changed over from a normal mode to a clamping mode if the voltage of the input signal falls below a predetermined clamping voltage, preferably 0 V. For this purpose, a third transistor is provided, which is connected into the input path in such a way that it is in a reverse conducting state in the clamping mode of the circuit and in a forward blocked state in the normal mode.

REFERENCES:
patent: 3703711 (1972-11-01), Duben
patent: 4764897 (1988-08-01), Kameyama et al.
patent: 4823315 (1989-04-01), Wood et al.
patent: 4926073 (1990-05-01), Pigott et al.
patent: 5436552 (1995-07-01), Kajimoto
patent: 5508961 (1996-04-01), Han
patent: 5519341 (1996-05-01), Corsi et al.
patent: 5576616 (1996-11-01), Ridgers
patent: 5614850 (1997-03-01), Corsi et al.

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