Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board
Reexamination Certificate
2002-07-01
2003-06-17
Talbot, Brian K. (Department: 1762)
Coating processes
Electrical product produced
Integrated circuit, printed circuit, or circuit board
C427S123000, C427S282000, C204S192320, C216S075000, C216S078000, C216S095000, C216S105000
Reexamination Certificate
active
06579565
ABSTRACT:
INDUSTRIAL FIELD
The present invention relates to a multilayered primed circuit board applicable to vast integration of semiconductor and a manufacturing method thereof.
BACKGROUND OF THE INVENTION
In these years, a highly integrated assembly board has been required accompanied with the demands for higher integration, more pins and less weight of semiconductor device. In order to accomplish theses demands, research and development for multiplying the layer of a circuit board and improving the circuit integration have been made.
As a method for multiplying the layer, so-called building up method has been developed and is widely used. The method is consisting of laminating insulating layer and circuit layer in which the connection between these layers is accomplished by giving the insulating layer photoetching, forming via holes and then forming a plating layer on the surface. In some cases, laser is used for forming the via holes.
Japanese laid open publication No. Hei 8-264971 discloses a manufacturing method of a multilayered printed circuit board using a building up method. The manufacturing method of this application is simply explained referring
FIG. 9
as mentioned below.
At first, the first resin layer
53
is formed in range
52
where any pattern is not formed on internal board
51
having internal conductor pattern
50
. The first resin layer
53
is formed so that prescribed clearance
54
is made between the lateral of internal conductor pattern
50
and the first resin layer
53
. Next, the second resin layer
55
composing an insulating layer by coating and then hardening resin varnish. The second resin layer
55
fills up clearance
54
and covers internal conductor pattern
50
and the first resin layer
53
. Then, adhesive layer
56
is formed on the second resin layer
55
followed by roughening. After that, outer conductor pattern
57
is formed on adhesive layer
56
be electroless plating.
However, the above-mentioned multilayered printed circuit board by building up method has the following problems to be solved.
Namely, in the above-mentioned method, when a multilayered printed circuit board is manufactured by laminating outer conductor pattern
57
on both sides of internal board having internal conductor pattern
50
, complicated processes such as formation of the first resin layer
53
, formation of the second resin layer
55
by coating and then hardening resin varnish, and further formation of adhesive layer
56
are required. For this reason, the reduction of cost of a multilayered printed circuit board using the building up method could not be attained.
There is another manufacturing method of multilayered printed circuit board in which metal thin film is formed by vaporizing. However, the method has a problem that when the film is thin (a few &mgr;m), pores are easily caused, while when the film is thick (10 &mgr;m or more), the productability is deteriorated, which causes high cost.
The present invention aims to solve such problems. The objective of the present invention is to produce a clad sheet for printed circuit board which can be manufactured at low cost and has excellent properties, a multilayered printed circuit board using thereof and a manufacturing method thereof.
DISCLOSURE OF THE INVENTION
The clad sheet for printed circuit board according to the present invention characterized in that it is manufactured by press-bonding a copper foil and a nickel foil at a reduction rate of 0.1 to 3%.
The clad sheet for printed circuit board according to another embodiment of the present invention is characterized in that it is manufactured by press-bonding a copper foil of which one side or both sides have nickel plating layer and another copper foil or a copper foil of which one side has nickel plating layer at a reduction rate of 0.1 to 3%.
The clad sheet for printed circuit board according to the present invention is characterized in that it is a five-layered sheet comprising layers of copper
ickel/copper
ickel/copper.
The multilayered printed circuit board according to the present invention is characterized in that it is comprising:
a base having an internal conductor layer formed by selectively etching the clad sheet for printed circuit board,
an insulating layer and an outer conductor layer formed on the surface of said base,
said outer conductor layer being made patterning, and
the internal conductor layer and the outer conductor layer being electrically connected by inter posing a columnar conductor formed in said base by etching.
The manufacturing method of a multilayered printed circuit board according to the present invention is characterized in that it is comprising:
forming a clad sheet for printed circuit board by laminating a copper foil serving as a conductor layer and a nickel foil or nickel plating serving as an etching-stopper layer and by simultaneously Press-bonding both at the reduction rate of 0.1 to 3%,
producing a base by selectively etching said multilayered clad sheet,
forming an insulating layer and an outer conductor layer on the surface of said sheet,
making patterning said outer conductor layer, and
electrically connecting the internal conductor layer end the outer conductor layer by interposing a columnar conductor formed in said sheet by etching.
The manufacturing method according to another embodiment of the present invention is characterized in that:
said clad sheet for printed circuit board is formed by laminating said copper foil and said nickel foil or nickel plating and cold-press-bonding both at the reduction rate of 0.1 to 3% after contacting surfaces of said copper foil and said nickel foil or nickel plating are previously activation-treated in a vacuum chamber, and in that case,
said activation treatment is carried out
(1) in a hyper low pressure inert gas atmosphere of 1×10
−1
to 1×10
−4
Torr,
(2) by glow-discharging charging alternate current of 1 to 50 MHz between an electrode A consisting of said copper foil and said nickel plating having contacting surface which are electrically grounded respectively end other electrode B insulatingly held, and
(3) by sputter-etching
(4) in the manner that the area of the electrode exposed in plasma generated by said glow-discharging is not more than ⅓ the area of electrode B.
REFERENCES:
patent: 4896813 (1990-01-01), Saijo et al.
patent: 188660 (1991-08-01), None
patent: 15993 (1992-01-01), None
patent: 291744 (1993-11-01), None
patent: 5664 (1996-01-01), None
Goro T, “Component Mounting Device”, Japanese Patent JP 8264971 A (Pub. No. 08-264971), Oct. 11, 1996; Abstract Only.
Hajime et al, “Manufacture of Multilayer Interconnection Board and Insulating Board with Multilayer Metal Layer”, Japanese Patent JP 5291744 A (Pub. No. 05-291744, Nov. 5, 1993; Abstract Only.
Masahiro K, “Manufacture of Multilayer Printed Wiring Board”, Japanese Patent JP 4015993 A (Pub. No. 04-015993), Jan. 21, 1992; Abstract Only.
Ohsawa Shinji
Saijo Kinji
Yoshida Kazuo
Browdy and Neimark PLLC
Talbot Brian K.
Toyo Kohan Co. Ltd.
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