Metal treatment – Compositions – Heat treating
Patent
1978-11-20
1980-07-15
Rutledge, L. Dewayne
Metal treatment
Compositions
Heat treating
29571, 148187, 357 23, 357 41, 357 59, 357 91, H01L 2978, H01L 2196, B01J 1700, H01L 1114
Patent
active
042126843
ABSTRACT:
A process for forming a CIS (conductor-insulator-semiconductor) integrated circuit having one or more field-effect memory transistors, and one or more polysilicon resistors and/or polysilicon conductors. The polysilicon components are formed to predetermined sizes, as needed, so that the implant used to establish the memory threshold voltage of the transistor also provides the desired polysilicon resistance value(s). The process may be used to simultaneously form both memory and non-memory transistors.
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Tsuchimoto et al., "Ion Impl.sup.n . . . Polycrystalline Si", Ion Implantation in Semiconductors, Ed. Namba, Plenum, New York, 1974.
Cavender J. T.
Dalton Philip A.
NCR Corporation
Rutledge L. Dewayne
Upendra Roy
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