Boots – shoes – and leggings
Patent
1995-08-28
1996-07-09
Coleman, Eric
Boots, shoes, and leggings
3642388, 3642386, 3642387, 364DIG1, 395437, G06F 1202
Patent
active
055354122
ABSTRACT:
From a data memory, there is obtained data at an address indicated by the sum of the values respectively of a base register, an index register, and an offset. The data is stored in a data register. A wrap-around process is executed after an arithmetic operation is conducted by an arithmetic unit n times, n being specified by the value loaded in a block-length register. When the value of the index register is equal to or more than that of the element number register, the value of the element number register is subtracted from that of the index register. Since there exists a chance in which arithmetic operation is achieved beyond a circular buffer area allocated in the data memory, a copy of the first portion of the circular buffer is provided after the circular buffer area. Only one wrap-around process is executed each time a plurality of arithmetic operations are conducted, thereby implementing a high-speed circular buffer.
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patent: 5463749 (1995-10-01), Wertheizer
J. L. Hennessy and D. A. Patternson, "Computer Architecture: A Quantitative Approach," Morgan Kaufmann Publishers, Inc., CA, 1990, pp. 160-167.
Coleman Eric
NEC Corporation
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