Circuits, systems and methods for improving row select speed in

Details Circuits, systems and methods for improving row select speed in Circuits, systems and methods for improving row select speed in

1995-01-31

1997-12-23

Powell, Mark R.

Computer graphics processing and selective visual display system

Display peripheral interface input device

Light pen for fluid matrix display panel

345196, 345201, 395427, 395410, 395438, 395404, 36523003, 36523006, G11C 1140

Patent

active

057011435

ABSTRACT:
A memory device 200 is provided which includes an array 202 of rows and columns of memory cells 201. Row decoder circuitry 206 is provided for selecting a given row of cells 201 for access. Circuitry 208, 209 is included for providing a selected one of a plurality of supply voltages to the row decoder circuitry 206, a first positive voltage provided during an active state of the row decoder circuitry 206 and a second positive voltage provided during an inactive state of the row decoder circuitry 206.

REFERENCES:
patent: 5034917 (1991-07-01), Bland et al.
patent: 5132932 (1992-07-01), Tobrta
patent: 5365479 (1994-11-01), Hoang et al.
patent: 5379264 (1995-01-01), Kobayashi et al.
patent: 5426601 (1995-06-01), Agata et al.
patent: 5442588 (1995-08-01), Runas
patent: 5452244 (1995-09-01), Rao
patent: 5455526 (1995-10-01), Runas
patent: 5500819 (1996-03-01), Runas
patent: 5506810 (1996-04-01), Runas

Affiliated with

Also associated with

Rating

Circuits, systems and methods for improving row select speed in does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Circuits, systems and methods for improving row select speed in , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuits, systems and methods for improving row select speed in will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1804938