Circuits for preventing breakdown of low-voltage device inputs d

Details Circuits for preventing breakdown of low-voltage device inputs d Circuits for preventing breakdown of low-voltage device inputs d

1991-04-19

1992-03-10

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

365226, 361 91, 3072965, 307475, H03K 1716, H03K 1710

Patent

active

050952285

ABSTRACT:
A circuit for isolating a first low-voltage circuit mode from a second circuit node which carries high programming voltages during programming of user-programmable interconnect elements includes a novel two input NAND gate having one input structure configured from high voltage devices connected to the second circuit node. The other input of the NAND gate is a control input for the isolation device and is connected to a low-voltage logic signal which is high when the signal from the high programming voltage node is to be passed through to the low-voltage node and low when the low-voltage node is to be isolated from the high programming voltage node. The output of the NAND gate is connected to the first low-voltage circuit node.

REFERENCES:
patent: 4565932 (1986-01-01), Kuo et al.
patent: 4712023 (1987-12-01), Otsuki et al.
patent: 4742492 (1988-05-01), Smayling et al.
patent: 4908799 (1990-03-01), Gaudronmeau
patent: 4916334 (1990-04-01), Minagawa et al.
patent: 4956569 (1990-09-01), Olivo et al.

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