Circuits for decoding pulse signals

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307232, 307234, 328110, 328112, H03K 1300, H03K 520

Patent

active

040399583

ABSTRACT:
A decoding circuit comprises: a gated oscillator, designed to generate a are-wave pulse train having a long first positive pulse followed by short spaces and short positive pulses, having its output connected to the clock input of an oscillator counter and its control input connected to the output of a flip-flop; a signal input terminal connected to the SET input of the flip-flop and also to the clock input of a signal counter; a first three-input AND gate having two inputs connected, respectively, in opposite phase to the first count outputs of the two counters and its third input connected through an inverter to the oscillator output; means connecting the gate output to RESETS of the flip-flop and the two counters; a second three-input AND gate having two inputs connected, respectively, in opposite phase to the Nth count outputs of the two counters and the third input connected directly to the oscillator output; means connecting the second gate output to the RESETS of the flip-flop and counters; a third three-input AND gate having two inputs connected, respectively, directly to the Nth count outputs of the counters and the third input connected directly to the oscillator output; and an output terminal connected to the output of the third gate.
In a modified decoding circuit, the gated oscillator is replaced by a modified oscillator, designed to generate a square-wave pulse train having a long first negative pulse followed by short positive pulses and spaces, and the first and second AND gates are replaced by NOR gates, with suitable inverter changes.

REFERENCES:
patent: 3667054 (1972-05-01), Nelson
patent: 3818358 (1974-06-01), Russell
patent: 3940764 (1976-02-01), Beeswing
patent: 3942125 (1976-03-01), Horiuchi

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