Circuits and methods for providing rail-to-rail output with...

Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Parallel controlled paths

Reexamination Certificate

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C327S103000

Reexamination Certificate

active

06265929

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to circuits and methods for providing rail-to-rail output stages. More particularly, this invention relates to circuits and methods for rail-to-rail output stages that provide high linearity without the use of feedback, that provide high linearity in their transconductance, that allow for designer-controllable idling currents, and that provide those designer-controllable idling currents independently of manufacturing processes, temperatures, and power supply voltages.
Rail-to-rail output stages are widely known in the prior art. The typical rail-to-rail output stage incorporates two common-source (or common-emitter) transistors of complementary polarities whose drains (or collectors) are connected together to form an output node that is connected to a load, whose sources (or emitters) are connected to a positive and a negative power supply voltage, and whose gates (or bases) are connected to two drive signals derived in turn from an external input signal. These output stages are very useful in that they maximize the output signal voltage swing capability of a circuit to nearly the limits of the power supply and, consequently, provide a maximal signal-to-noise ratio for a given noise level.
Many known circuits and methods for providing rail-to-rail output stages, however, exhibit very non-linear input to output transfer characteristics. These non-linear input to output characteristics often lead to signal distortion, especially at high frequencies where limited loop gain is available for correcting the output stage non-linearity by negative feedback. It is, therefore, desirable to provide high linearity in these output stages without the use of feedback.
In rail-to-rail output stages, it is often also desirable to maintain a known idling current flowing in each of the transistors of the output stage. This idling current is the current that flows in the transistors when the output stage is neither driving current into, nor sinking current from, a load that is connected to the output node. By maintaining an idling current in the transistors of the output stage, cross-over distortion in the output stage is kept to a minimum. However, this idling current can be difficult to control because of variations in manufacturing processes, temperatures, and power supply voltages of the components used to implement the output stage.
SUMMARY OF THE INVENTION
In view of the foregoing, it is an object of this invention to provide rail-to-rail output stages that achieve high linearity.
It is a further object of this invention to provide rail-to-rail output stages that achieve high linearity in their transconductance.
It is a still further object of this invention to provide rail-to-rail output stages that allow for designer-controllable idling currents.
It is also an object of this invention to provide rail-to-rail output stages that achieve high linearity without the use of feedback.
It is a yet further object of this invention to provide rail-to-rail output stages that allow idling currents to be independent of manufacturing processes, temperatures, and power supply voltages.
In accordance with the present invention, circuits and methods for rail-to-rail output stages that achieve these and other objects are provided. More particularly, the circuits and methods of the present invention provide rail-to-rail output stages that cancel the non-linearities inherent in transconductances of transistors in the output stages, that allow the idling current in the output stages to be controlled by current sources and device-size ratios, and that enable the idling current in the output stages to be maintained independently of manufacturing processes, temperatures, and power supply voltages.
Generally speaking, at a functional level, output stages constructed in accordance with the present invention comprise a two-transistor complementary subcircuit, a current mirror circuit, and an output driver circuit. These circuits are arranged so that an input signal is provided to the two-transistor complementary subcircuit and the output driver circuit. A bias voltage is also connected to the two-transistor complementary subcircuit. The two-transistor complementary subcircuit and the output driver circuit may also be connected to a supply voltage. The two-transistor complementary subcircuit drives the current mirror circuit. The current mirror circuit is also connected to another supply voltage. The current mirror circuit and the output driver circuit share a common terminal which is connected to a load. The load is also connected to a ground typically having a potential between the voltage supplied by the two supply voltages.
In operation, preferred output stages constructed in accordance with the present invention receive an input signal from an external source and a bias voltage from a bias generator, such as that described below. Responsive to this input signal, an output driver may produce a push current that feeds current into a load. Responsive to a voltage difference created by the input signal and the bias voltage, a two-transistor complementary subcircuit may feed a subcircuit current into a current mirror. In proportion to this subcircuit current, the current mirror then pulls a pull current from the load. When the push current that is being fed into the load by the output driver matches the pull current that is being pulled into the current mirror from the load, the output stage is said to be “idling” because the net current flowing in the load is zero. The response of the load current to input-signal voltage is, as usual, termed transconductance.
While the output driver is providing at least some push current and the current mirror is pulling in at least some pull current, the output stages of the present invention provide a substantially linear transconductance. This linear transconductance is achieved by the output stages matching the non-linear component of the push-path transconductance with a canceling, non-linear component of the pull-path transconductance. When a sufficiently strong voltage is provided as an input signal, one of the push or pull currents stops flowing. Once one of these currents stops flowing, the output stage stops canceling the non-linear components of the output signal and, instead, enters class AB operation wherein power efficiency is improved.
The output stages of the present invention may also incorporate bias voltage generation circuits to produce voltages that can be used as bias voltages for the output stages. These bias voltage generation circuits produce the desired bias voltages by mimicking the transistor voltages and currents produced in the output stages when operating at their idling points. Consequently, the idling currents in the output stages can be set ratiometrically with device-size ratios and reference current sources. The bias voltage generation circuits produce bias voltages for the rail-to-rail output stages so that the desired idling currents will be produced in the output stages independently of integrated circuit manufacturing processes, temperatures, and power supply voltages.


REFERENCES:
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patent: 5625306 (1997-04-01), Tada
patent: 5844442 (1998-12-01), Brehmer
Joseph N. Babanezhad et al.: “A Programmable Gain/Loss Circuit,”IEEE Journal of Solid-State Circuits, vol. SC-22, No. Dec 6, 1987.*
Klaas-Jan de Langen, Ron Hogervorst, and Johan H. Huijsing; “Translinear circuits in low-voltage operational amplifiers;” In Sansen, Huijsing, and van de Plassche, editors,Analog Circuit Design: MOST RF Circuits, Sigma-Delta Converters, and Translinear Circuits, Kluwer Academic Publishers, 1996.
Rinaldo Castello and Paul R. Gray; “A high-performance micropower switched-capacitor filter;”IEEE Journal of Solid-State Circuitsvol. SC-20 No. 6 pp. 1122-1132, Dec. 1985.
Paul R. Gray; “Basic MOS operational amplifier design—an overview;” In Gray, Hodges, and Brodersen, editors,Analog MOS Integrated Circuits, IEEE Press, 1980.

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