Circuits and methods for intelligent acknowledgement based flow

Multiplex communications – Wide area network – Packet switching

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Details

39520054, 370229, G06F 1300

Patent

active

058156674

ABSTRACT:
The present invention is directed, in general, to network connectivity, and more specifically to circuits and methods for intelligent acknowledgment-based flow control in a processing system network. The present invention concerns governing transmission of data packets and reception indicia by a transmission circuit over a network. Detector circuitry is included and is operative to (1) monitor a first latency characteristic of the network that is indicative, at least in part, of a utilization level of the network; and (2) monitor a second latency characteristic indicative, at least in part, of an efficiency level associated with transmission of the reception indicia by the transmission circuit. Control circuit is further included and is associated with the detector circuitry and the transmission circuit. The control circuit is operative to (1) adjust a retransmission delay of the transmission circuit of the data packets over the network as a function of the first latency characteristic, thereby allowing the management circuit to manage the retransmission delay as a function of the utilization level of said network; and (2) adjust a transmission delay of the transmission circuit of the reception indica over the network as a function of the second latency characteristic to thereby allow the management circuit to manage the transmission delay as a function of the efficiency level associated with the transmission circuit.

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