Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder
Reexamination Certificate
1997-11-25
2001-09-04
JeanPierre, Peguy (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Differential encoder and/or decoder
C341S077000
Reexamination Certificate
active
06285306
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to improvements in waveform processors, and more particularly to improvements in digital signal processing of sigma delta modulated (SUM) pulse streams, and in one aspect to methods and circuits for mixed analog/digital processing of one or more delta modulated (DM) pulse streams.
2. Relevent Background
Traditionally, DM has been used in military applications, particularly in adaptive delta modulation (ADM). Recent advances in semiconductor technology and in charged coupled capacitor devices led many integrated circuit (IC) producers, such as Motorola, Analog Devices Corporation, Crystal, and others, to successfully design chips for a variety of delta modulators. The basic idea is to use a highly oversampled linear delta modulator (LDM) to achieve a high signal-to-noise ratio. A high frequency (in the order of MHz) pulse density stream is not suitable for direct conventional digital signal processing (DSP), and therefore, decimation is generally used to assure proper speed, in order to interface with existing DSP hardware.
In the past, there have been attempts to process the DM pulse stream in a direct fashion. To achieve such direct processing, specialized hardware is needed. One known approach for addition of two DM sequences using a delta adder (DA) was proposed by N. Kouvaras, “Operations on Delta Modulated Signals and their Applications in Realization of Digital Filters,”
The Radio and Electronics Engineering
, Vol. 48, No. 9, September, 1978, pp. 431-438, incorporated herein by reference. Therefore, the operation of a delta adder circuit is to add digital input signals X
n
and Y
n
applied to the input terminals. Assuming X
n
and Y
n
to be DM sequences, then, as shown in
FIG. 1
, the output sequence produced by the delta adder is also a binary DM sequence. According to Kouvaras' findings, a demodulated signal of sum S
n
results in an analog signal s(t) whose amplitude is equal to ½ (x(t)+y(t)), as shown in
FIG. 1
a.
Yet another attempt to process DM signals in a direct form was proposed by Massey, U.S. Pat. No. 4,450,532. Massey proposed a circuit arrangement for receiving an applied analog type electrical signal and generating a pulse train output signal whose average frequency is proportional to the square of the applied analog signal.
Lu, U.S. Pat. No. 4,622,649, proposed an improved convolution processor that requires no multiplication operations. Yamazaki, US patent 5,208,594, proposed using a multibit signal processing technique to process one bit DM pulse stream.
Simone, U.S. Pat. 3,314,015, synthesized an “artificial transfer network”, having a desired transfer response, employing high speed digital and analog techniques.
Nishino, et al., U.S. Pat. No. 4,730,165, proposed a nonlinear signal processing apparatus employing analog signal processing techniques. The time varying input signal is nonlinearly processed by a differential circuit and then arithmetically combined with the input signal.
Yet another approach, described by Kikkert in U.S. Pat. No. 4,320,361, deals with mixed analog/digital signal of a DM pulse stream. The digital data is arranged to operate a switch which, in the case of amplitude modulation, produces carrier frequency pulses.
SUMMARY OF THE INVENTION
In light of the above, therefore, it is an object of the invention to provide a circuit and apparatus for signal processing using a Sigma Delta Modulator (SDM) pulse stream.
It is another object of the invention to provide an improved method and circuit for performing fully digital signal processing, utilizing novel pulse density modulation techniques and mixed analog/digital signal processing, as well.
These and other objects, features, and advantages of the invention, will become apparent to those skilled in the art from the following detailed description, when read in conjunction with accompanying drawings and appended claims.
As will become apparent, the present invention addresses two novel processing devices for a DM pulse stream. The first one is fully digital, and the second one is mixed analog and digital.
REFERENCES:
patent: 4320361 (1982-03-01), Kikkert
patent: 4450532 (1984-05-01), Massey
patent: 4622649 (1986-11-01), Lu
patent: 4730165 (1988-03-01), Nishino et al.
patent: 5208594 (1993-05-01), Yamazaki
patent: 5349353 (1994-09-01), Zrilic
N. Kouravas, “Operations on Delta Modulated Signals and Their Applications in Realization of Digital Filters,” The Radio and Electronics Engineering, vol. 48, No. 9, Sep., 1978, pp. 431-438.*
Hein and Zakhor in Sigma Delta modulators: Nonlinear Decoding Algorithms and Stability Analysis, Kluwer Academic Press, 1993, pp 48.*
Zrilic, “A New Digital to Analog Converter based on Delta Modulation”, IEEE Proceedings of the 37th Midwest Symposium on Circuit and Systems, Aug., 1994, pp. 1193.*
Freedman and Zrilic, “Nonlinear Arithmetic Operations on the Sigma Delta Pulse Stream” Signal Processing Elsevier, vol. 21, 1990, pp 25-35.*
Zrilic, et al., Realization of Digital Filters for Delta-Modulated Signa 30th Midwest Symposium on Circuits and Systems, Syracuse Univ. 8/87.
Zrilic, “An Algorithm for Synthesis of Linear and Nonlinear Functions—Waveform Synthetizer”, Unpublished patent disclosure 9/88.
Zrilic, “Mapping of Boolean functions onto non-logical domain”, dated Oct. 26, 1988, publication status unknown.
Zrilic, et al. “Simplifier realisation of delta-sigma decoder” IEE Electronics Letters Online No. 19971057, 6/97.
Winkles et al., “Hardware Implementation of a Delta-Sigma Decoder-Digital Approach”, NASA Technical Advances in Aeronautics, Space Sciences and Technology, Earth Systems Sciences, Global Hydrology, and Education vol. II, pp. 422-425 (1997).
John-Kaysing et al., “Hardware Implementation of a Delta-Sigma Decoder-Digitalapproach”, NASA Technical Advances in Aeronautics, Space Science and Technology, Earth Systems Sciences, Global Hydrology, and Education vol. II, pp. 426-430 (1997).
Zrilic, “A Special Purpose Ternary Delta Multiplier”, 30th Midwest Symposium on Circuits and Systems, Syracuse Univ. 8/87.
Zrilic, et al., “Implementing Signal Processing Functions on Ternary Encoded Delta-Modulated Pulse Streams”, 1988 IEEE International Symposium on Circuits and Systems, vol. 2, pp 1553-1956 (1988).
Bachand Richard A.
Jean-Pierre Peguy
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