Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Reexamination Certificate
1999-07-15
2003-04-01
Talbott, David L. (Department: 2827)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
C361S761000, C361S762000, C361S763000, C361S782000, C361S792000, C361S795000, C174S260000, C336S200000, C428S209000, C428S213000, C428S215000, C428S216000, C029S832000, C029S846000, C029S854000
Reexamination Certificate
active
06542379
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention pertains generally to high density surface laminar circuitry containing embedded or integrated passive components such as resistors, capacitors, transformers and inductors.
2. Description of Related Art
Surface Laminar Circuitry™ (SLC) technology provides a significant advantage in its ability to provide high density electronic packaging. The primary advantage is due to the microvias which allow high density interconnect capability between different wiring layers. The use of microvias provides more open area for wiring of circuits, as the area is not consumed by large diameter drilled PTHs (plated through holes) and their associated, large diameter lands and clearance lands.
Electronic packaging requires the interconnection of hundreds and even thousands of different devices. The primary, or active, devices consist of integrated circuits (ie. logic or memory integrated circuits). Proper functioning of each active device requires the addition of passive devices (resistors, capacitors, transformers and inductors) to properly modify the signals into and out of the integrated circuit. These passive devices in today's electronic packages consume a large percentage of the surface real estate that might otherwise be available for even higher circuit densities.
Soldering of discrete components on the surface(s) of the board uses much of the potential wiring real estate for placement of these components. Integration of the passive components provides more real estate for high density wiring, and also provides improved performance due to the closer proximity of the passive devices to the integrated circuits. In the past, this problem has been solved by packaging the passive components as discrete components (pin in hole or surface mount) and soldering them onto the circuit board.
SUMMARY OF THE INVENTION
It is an objective of the present invention to have an electronic package that is able to utilize the full high density wiring capability of the Surface Laminar Circuitry™ technology.
Another objective is to increase the circuit density, provide simpler signal routing, reduce the number of plated through-hole and solder joints, reduce assembly costs and enhance electrical performance.
The Surface Laminar Circuitry™ structure with integrated passive components and method for producing the structure as hereafter disclosed will provide this capability.
These and other objectives are achieved in accordance with the present invention as follows.
A high density electronic package comprises a substrate having an electrically conductive layer, preferably of copper foil and an imageable dielectric material on the electrically conductive layer and providing at least one generally planar surface. The dielectric material preferably has a dielectric constant of about 5.0 or less. Typically, it comprises an epoxy containing an imageable substance incorporated therein. At least one active device comprising an integrated circuit is mounted on said generally planar surface. At least one passive device selected from the group consisting of one or more resistors, capacitors, transformers, inductors and combinations thereof is integrated into the dielectric material in electrical communication with the at least one active device.
In another aspect of the invention, a method of producing a high density electronic package is described. The package is composed of an imageable dielectric material having at least one planar surface, at least one active device mounted on said surface and at least one passive device integrated into the surface of the dielectric material and electrically joined to the active device. The method comprises the steps of applying a thin layer of an imageable dielectric material over a circuit pattern; imaging a pattern for said passive device on the surface of the dielectric material to create at least one recess in the surface of the dielectric material; and filling the recess with a material having the requisite properties of the passive device. The imageable dielectric material is one that can be imaged by light, laser, plasma or other similar means. At least one, but preferably a plurality of passive devices having the same or different characteristics and capacities can be integrated into the dielectric material. These may include decoupling or in-circuit capacitors, resistors, transformers and inductors.
The invention relates to a circuit structure comprising a substrate including a first conductive layer of a suitable metal such as a foil or electrodeposit of copper, a layer of a photoimaged dielectric material over the first conductive layer, and a second conductive layer of a metal such as copper over the dielectric. The dielectric includes at least one passive device, and a plurality of photovias electrically joining the two conductive layers. The passive device is selected from the group consisting of capacitors, resistors, inductors and transformers. When the passive device is a capacitor device, the first conductive metal layer contains a circuit pattern defined therein and is electrically joined through the photovias to a circuit pattern defined in the second conductive metal layer. A second portion of the first conductive layer is imaged in the pattern of a bottom capacitor and is electrically joined through one or more photovias to a second portion of the second copper layer imaged in the pattern of a top capacitor. When the passive device is a resistor, it is composed of an electrical resistor material disposed in a photoimaged opening in the dielectric material. The resistor is either coplanar with, or vertical to the dielectric layer. When the passive device is an inductor or a transformer, the first and second conductive metal layers each contain a plurality of parallel lines, and the photoimaged dielectric layer covers the parallel lines and contains a plurality of photovias that join the ends of the parallel lines in the first conductive layer with those in the second conductive layer. The dielectric contains a photoimaged opening or channel over a portion of the lines midway between their ends, and the opening contains a high permeability material to form an inductor. Alternatively, the first and second conductive layers contain a first row of parallel lines electrically joined to one another through the photovias to form a primary transformer winding, and a second row of lines electrically joined in a similar manner to form a secondary winding. The high permeability material in the photoimaged opening in the dielectric comprises a ferrite core which cooperates with the primary and secondary windings to form a transformer.
The invention also relates to an electronic structure comprising one or more passive devices such as inductors, capacitors, resistors or transformers integrated into the imaged surface of an imageable dielectric material. The surface is imaged to create one or more recesses or openings shaped to receive each of the passive devices.
REFERENCES:
patent: 4566186 (1986-01-01), Bauer et al.
patent: 4604160 (1986-08-01), Murakami et al.
patent: 4889790 (1989-12-01), Roos et al.
patent: 4992354 (1991-02-01), Axon et al.
patent: 4999740 (1991-03-01), Ilardi et al.
patent: 5227012 (1993-07-01), Brandli et al.
patent: 5239448 (1993-08-01), Perkins et al.
patent: 5262280 (1993-11-01), Knudsen et al.
patent: 5334487 (1994-08-01), Kindl et al.
patent: 5366846 (1994-11-01), Knudsen et al.
patent: 5371029 (1994-12-01), Abdo et al.
patent: 5485038 (1996-01-01), Licari et al.
patent: 5501941 (1996-03-01), Ngo
patent: 5599655 (1997-02-01), Ngo
patent: 5599747 (1997-02-01), Bhatt et al.
patent: 5612660 (1997-03-01), Takimoto
patent: 5623160 (1997-04-01), Liberkowski
patent: 5635761 (1997-06-01), Cao et al.
patent: 5643657 (1997-07-01), Dueber et al.
patent: 5648200 (1997-07-01), Letize et al.
patent: 5665650 (1997-09-01), Lauffer et al.
patent: 5691395 (1997-11-01), Knudsen et al.
patent: 5700607 (1997-12-01), Rath et al.
patent: 5707782 (1998-01-01), Economy et al.
patent: 5709979 (1998
Lauffer John M.
Russell David J.
Driggs Lucas Brubaker & Hogg Co. LPA
International Business Machines - Corporation
Lucas James A.
Talbott David L.
Vigushin John B.
LandOfFree
Circuitry with integrated passive components and method for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Circuitry with integrated passive components and method for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuitry with integrated passive components and method for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3024250