Circuitry for transmitting clock information with pulse signals

Pulse or digital communications – Repeaters – Testing

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Details

375113, H04L 2549, H04L 706

Patent

active

042649730

ABSTRACT:
Circuitry is disclosed for transmitting clock signal information with a transmitted signal. The transmitted signal is obtained by applying non-return to zero input pulse signals, provided at one-half the frequency of the clock signal, with alternate "1" logic and "0" logic signals, which are coincident with the transitions in the pulse signals, to an exclusive-or logic circuit and combining the output of the exclusive-or logic circuit with the alternate "1" and "0" logic signals at an adder circuit. The adder circuit provides an output that is a succession of signals at one-half the frequency of the clock signal with each of the successive signals having an amplitude different than the amplitude of the preceding signal. The logic signals provided to the adder circuit have an amplitude equal to or greater than the output of the exclusive-or logic circuit. Circuitry is also disclosed for recovering the clock information from the signal provided from the adder and for reconstructing the input pulse signals.

REFERENCES:
patent: 2912684 (1959-11-01), Steele
patent: 3846583 (1974-11-01), Boulter
patent: 3863025 (1975-01-01), Gonsewski et al.

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