Circuitry for synchronizing a multiple channel circuit tester

Details Circuitry for synchronizing a multiple channel circuit tester Circuitry for synchronizing a multiple channel circuit tester

1985-11-01

1987-04-21

Atkinson, Charles E.

Excavating

324 73R, G01R 3128

Patent

active

046601970

ABSTRACT:
Quickly synchronizing adjustable delay circuits for a multiple channel tester by using a timing pulse that has reached the end of a given path in the tester to trigger the following timing pulse of a timing generator, thereby providing oscillating timing pulses having an associated frequency related to the propagation delay associated with the particular path, comparing the associated frequency with a reference frequency and adjusting a delay provided in the path until the associated frequency matches a desired frequency.

REFERENCES:
patent: Re31056 (1982-10-01), Chau et al.
patent: 3976940 (1976-08-01), Chau et al.
patent: 4392105 (1983-07-01), McLeod
patent: 4489272 (1984-12-01), McLeod
patent: 4497056 (1985-01-01), Sugamori

Affiliated with

Also associated with

Rating

Circuitry for synchronizing a multiple channel circuit tester does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Circuitry for synchronizing a multiple channel circuit tester, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuitry for synchronizing a multiple channel circuit tester will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-756652