Circuitry for reducing the skew between two signals

Details Circuitry for reducing the skew between two signals Circuitry for reducing the skew between two signals

2005-05-24

2005-05-24

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S276000

Reexamination Certificate

active

06897694

ABSTRACT:
An electronic integrated circuit includes a first signal (A1) generated by a first source block (10) and a second signal (B1) generated by a second source block (12). A variable delay circuit (18) detects a delay between said first and second signals in calibration mode and applies the delay to the first signal during normal operation of the circuit. A fixed delay buffer (32) may be used to apply a delay to the second signal to compensate for known delays associated with the variable delay circuit (18).

REFERENCES:
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patent: 5880612 (1999-03-01), Kim
patent: 6192092 (2001-02-01), Dizon et al.
patent: 6469550 (2002-10-01), Kurd
patent: 20020191719 (2002-12-01), Hasako et al.
patent: 199 20 335 (2000-09-01), None
patent: 0 831 588 (1989-03-01), None
patent: 2 768 575 (1999-03-01), None

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