Circuitry for padded communication protocols

Details Circuitry for padded communication protocols Circuitry for padded communication protocols

2003-11-14

2008-10-28

Payne, David C. (Department: 2611)

Pulse or digital communications

Transmitters

C375S213000

Reexamination Certificate

active

07443922

ABSTRACT:
Transmitter and receiver circuitry for 64b/66b encoding or other similar padded data signalling. The required transmitter clock circuitry is simplified by using one clock signal source as a basis for at least partly processing the data both before and after padding. Appropriate frequency multiplication and division factors are employed to make this possible. Similar techniques are used in receiver circuitry.

REFERENCES:
patent: 4486739 (1984-12-01), Franaszek et al.
patent: 2001/0033188 (2001-10-01), Aung et al.
patent: 2002/0190751 (2002-12-01), Lee et al.
patent: 2003/0052709 (2003-03-01), Venkata et al.
patent: 2003/0058894 (2003-03-01), Feuerstraeter et al.
U.S. Appl. No. 10/059,014, Lee et al., filed Jan. 29, 2002.
U.S. Appl. No. 10/273,899, Venkata et al., filed Oct. 16, 2002.
U.S. Appl. No. 10/317,262, Venkata et al., filed Dec. 10, 2002.
U.S. Appl. No. 10/317,264, Venkata et al., filed Dec. 10, 2002.
U.S. Appl. No. 10/454,626, Lui et al., filed Jun. 3, 2003.
U.S. Appl. No. 10/349,541, Venkata et al., filed Jan. 21, 2003.

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