Circuitry for identifying the validity of received data words

Details Circuitry for identifying the validity of received data words Circuitry for identifying the validity of received data words

1983-03-28

1986-09-09

Thomas, James D.

Excavating

G06F 1342

Patent

active

046113266

ABSTRACT:
A multi-stage modem status register, which has at least one stage which is ordinarily unused, is employed to receive operating condition signals from an associated modem. In addition bistable circuitry, which exists as part of the control circuitry of a transceiver, is used: (1) to provide a first binary signal when a data processor (with which the present system is used), generates a "resynchronization request" signal; and (2) to provide a second binary signal in response to resynchronization being achieved. The bistable circuitry is connected to the above described ordinarily unused stage to enable one or the other of the binary signals to be present. The multi-stage modem status register is regularly interrogated and the results are sent to both a memory and a comparison device. Output signals from the memory are transmitted to said comparison device, at the time that the results of a subsequent interrogation are transmitted to the comparison device. Hence, the operating condition signals from said modem status register, as they appear in two different time frames, are compared. When the modem status register changes its condition status, as indicated by a change of state of the bistable device, the comparison device provides an output signal to distinguish between probable invalid received data words and probable valid received data words.

REFERENCES:
patent: 3472961 (1969-10-01), Wheeler
patent: 3786415 (1974-01-01), Phillips et al.
patent: 3938082 (1976-02-01), Schowe
patent: 3975712 (1976-08-01), Hepworth
patent: 4071887 (1978-01-01), Daly
patent: 4106091 (1978-08-01), Hepworth
patent: 4346440 (1982-08-01), Kyu
patent: 4370648 (1983-01-01), Wagner et al.
patent: 4393464 (1983-07-01), Knapp

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