Circuitry for generating sums, especially scalar products

Details Circuitry for generating sums, especially scalar products Circuitry for generating sums, especially scalar products

1987-03-18

1989-09-12

Harkcom, Gary V.

Boots, shoes, and leggings

G06F 738

Patent

active

048666530

ABSTRACT:
Circuitry for the summation, especially for generation, of scalar products, to which one summand in floating-point representation is conveyed per machine cycle (ZT), in which, after conversion into fixed point representation, it is received in a summing unit with an accumulator (AS1,-AS4) comprising the whole exponent range. The accumulator is subdivided into row sections, which are longer than the mantissa of the summands. Partial exponents (EPK1,-EPK4) generated in an exponent analyzer (EXA) control the mantissa positioner (PM) or are allocated to the mantissas and delivered continuously and cycle-wise to transfer registers (RE1,-RE4; RVS1,-RVS4; RNS1, RNS4), controlling summation row-wise. The carriers are allocated to the accumulator sections and intermediately stored in carry memory sections (CS1,-CS4) and are not added digit positionwise to the contents of each adjacent memory section until the sum is output, further carries being continuously processed. Afterwards the rounded result mantissa (ME) is generated in transfer registers (RA1, RA2, RPR) arranged downstream and the result exponent (EE) is generated in an exponent generator (EXG).

REFERENCES:
patent: 4622650 (1986-11-01), Kulisch
Kulisch, V., Grundlagen des numerischen Rechnens-Mathematische Begrundung der Rechnerarthmetik Bibliograph Inst. Mannheim, 1976.

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