Circuitry for delivering a signal to different load elements loc

Details Circuitry for delivering a signal to different load elements loc Circuitry for delivering a signal to different load elements loc

1995-06-30

1996-05-21

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

327565, 327306, 333100, 333136, H03K 104, H01L 2500

Patent

active

055193501

ABSTRACT:
In an electronic system such as an integrated circuit having a number of destination loads such as logic gates, signal is distributed along typically a zero'th level (e.g., polysilicon) electrical transmission line from an input terminal to the destination loads. The characteristics of the signal arriving at the destination loads are improved by (1) inserting an added electrical transmission line, and (2) connecting various nodes of the added electrical transmission line through auxiliary active devices, such as inverters, to various nodes on the zero'th level electrical transmission line. In one attractive arrangement, each of the auxiliary active devices has an electrical-current-drive capability that increases monotonically with the number of nodes intervening between it and the input terminal of the added electrical transmission line.

REFERENCES:
patent: 3586871 (1971-06-01), Seidel
patent: 4247817 (1981-01-01), Heller
patent: 5387885 (1995-02-01), Chi
H. B. Bakoglu et al., "Optimal Interconnection Circuits for VLSI," IEEE Transaction On Electron Devices, vol. ED-32, pp. 903-909 (May 1985).
K. Ochii et al., "A 17ns 64K CMOS RAM with a Schmitt Trigger Sense Amplifier," 85 IEEE International Solid-State Circuits Conference, pp. 64-65, 306 (Feb. 1985).

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