Circuitry for controlled rate of power application to CMOS micro

Details Circuitry for controlled rate of power application to CMOS micro Circuitry for controlled rate of power application to CMOS micro

1990-09-28

1991-12-03

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072965, 307591, 307269, 307480, H03K 3017, H03K 19003, H03K 1716, H03K 3013

Patent

active

050702572

ABSTRACT:
A method and circuitry for controlling the rate of power dissipation of CMOS microcircuits during start-up. In accordance with the invention, either the clock frequency or the duty cycle of clock activity is changed, from zero at the instant of application of the power supply voltage, to the final operating frequency or activity at the end of a warm-up period. As a result, transient temperature differentials between integrated circuit die and the substrates to which they are attached are minimized, increasing the reliability of the CMOS circuitry.

REFERENCES:
patent: 4719368 (1988-01-01), Burkhardt
patent: 4977335 (1990-12-01), Ogawa
patent: 4982116 (1991-01-01), Lee

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