Circuitry for carrying out square root and division operations

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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C708S504000, C708S605000, C708S656000

Reexamination Certificate

active

10291218

ABSTRACT:
The invention provides circuitry for carrying out a square root operation and a division operation. The circuitry utilizes common iteration circuitry for carrying out a plurality of iterations and means for identifying if an square root operation or a division operation is to be performed. The iteration circuitry is controlled in accordance with whether a square root or division operation is to be performed.

REFERENCES:
patent: 4939686 (1990-07-01), Fandrianto
patent: 5177703 (1993-01-01), Mori
patent: 5787030 (1998-07-01), Prabhu et al.
patent: 5789955 (1998-08-01), Scheraga
patent: 6108682 (2000-08-01), Matheny
Oberman et al. “Division Algorithms and Implementations”, IEEE Transactions on Computers, vol. 46, No. 8, pp. 833-854, Aug. 1997.
Matsubara, et al., “30-ns 55-b Shared Radix 2 Division and Square Root Using a Self-Timed Circuit”, XP-548639A,IEEE Comp. Soc. Press; vol. SYMP. 12., Jul. 19, 1995.
International Search Report, EP 01309851, dated Aug. 30, 2002.

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