Circuitry for automatically entering and terminating an initiali

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Details

364264, 3642813, 3642821, G06F 900, G06F 1200

Patent

active

052631680

ABSTRACT:
A data processing system (10), comprised of a central processing unit (14) and a memory system (16), has an efficient initialization operation. The memory system (16) provides a bus interface unit (20) to automatically determine whether the system (10) should execute an initialization operation or function in a normal mode of operation. The memory system (16) begins execution of the initialization operation of the system (10) in response to both a logic value of a reset signal and a value of an address transferred by an address bus. The memory system (16) automatically terminates execution of the initialization operation in response to the value of the address transferred by the address bus.

REFERENCES:
patent: 4044337 (1977-08-01), Hicks et al.
patent: 4354225 (1982-10-01), Frieder et al.
patent: 4470127 (1984-09-01), Thompson
patent: 4516199 (1985-05-01), Frieder et al.
patent: 4527237 (1985-07-01), Frieder et al.
patent: 4805093 (1989-02-01), Ward

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